Power level detection circuit

Details Power level detection circuit Power level detection circuit

2002-07-24

2004-01-13

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S075000, C327S076000

Reexamination Certificate

active

06677785

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of level detection circuitry, and in particular, to a circuit for detecting the level of an input signal, such as a power supply signal.
2. Background Art
Power level detection circuits are commonly used to control power switching in a variety of operations, such as in multi-power systems or to initialize a system when a particular power level is detected.
Hysteresis is a well-known concept where there is positive transition (i.e., signal goes from low to high) at a higher detection level, and negative transition (i.e., signal goes from high to low) at a lower detection level. In other words, when the input signal goes from low to high, the detection level is higher than the detection level for detecting a signal that goes from high to low, and when the input signal goes from high to low, the detection level is lower than the detection level for detecting a signal that goes from low to high. Hysteresis circuits are typically used to ignore spike noises on the signal.
U.S. Pat. No. 6,229,352 illustrates a power level detection circuit that uses the hysteresis concept in its translator shown in FIG.
1
. However, the power level detection circuit in U.S. Pat. No. 6,229,352 suffers from several drawbacks.
First, power detection levels are different for power up and for power down. This is seen from the fact that Vcc is the input, and the output
20
of the pulse shaper
18
is used to set the output of the translator
16
. Thus, when the input signal goes from low to high, the detection level is higher than the detection level for detecting a signal that goes from high to low, and when the input signal goes from high to low, the detection level is lower than the detection level for detecting a signal that goes from low to high. As explained above, this behaviour is called hysteresis. This means that the detection level is different for positive transition and negative transition, which is undesirable because power conflict and excessive power consumption would result if this circuit were used to control power switching between two different power sources. Power conflicts occur when power switches from one source to another. If these two power sources have different voltage levels, then each of these two power sources will try to overcome the other over a short period of time when the switches between these two power sources are both turned on.
Second, noise immunity is dependent on the hysteresis level and this conflicts with the accuracy of the power detection. In other words, noise affects the accurate detection of the power level.
The recent trend in newer power supply and switching systems is to utilize lower power levels. However, setting the hysteresis level will be difficult. For example, setting higher hysteresis may induce power conflict issues, and setting lower hysteresis will provide little noise immunity. For lower power levels, designing a circuit with an appropriate hysteresis level will be difficult because design margin will be tight.
Thus, there still remains a need for a power level detection circuit that avoids the drawbacks set forth above.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a power level detection circuit where the switching level is set by a mid-level detector.
It is another object of the present invention to provide a power level detection circuit using the hysteresis concept where the hysteresis level is set by a high-level detector and a low-level detector.
It is yet another object of the present invention to provide a power level detection circuit that has a simple architecture.
To accomplish the objectives of the present invention, there is provided a power level detection circuit for detecting the voltage level of a power source. The power level detection circuit has a first voltage level detector having an input coupled to the power source and outputting a first signal representative of an upper boundary, a second voltage level detector having an input coupled to the power source and outputting a second signal representative of a desired detection level, and a third voltage level detector having an input coupled to the power source and outputting a third signal representative of a lower boundary. The power level detection circuit also has a control circuit coupled to the first, second and third signals for outputting a power level detection signal if there is a change in the second signal, and when the power level is greater than the level of the third signal and less than the level of the first signal.


REFERENCES:
patent: 5945920 (1999-08-01), Maletsky
patent: 6229352 (2001-05-01), Chevallier et al.
patent: 6469936 (2002-10-01), Roohparvar
patent: 6519191 (2003-02-01), Morishita

Affiliated with

Also associated with

Rating

Power level detection circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Power level detection circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power level detection circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3244458