Power interconnect structure for balanced bitline...

Details Power interconnect structure for balanced bitline... Power interconnect structure for balanced bitline...

2007-06-05

2007-06-05

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S214000

Reexamination Certificate

active

11173930

ABSTRACT:
According to one exemplary embodiment, a semiconductor die includes a memory core array situated over a substrate, where the memory core array includes a number of bitlines, where the bitlines can be situated in a first interconnect metal layer in the semiconductor die. The semiconductor die further includes an interconnect structure situated over the memory core array, where the interconnect structure is situated in a second interconnect metal layer in the semiconductor die and situated over each of the bitlines. The interconnect structure can include at least one interconnect line, which can form an angle with respect to the bitlines that can be greater than 0.0 degrees and less than or equal to 90.0 degrees. The interconnect structure can form one of a number of capacitances with each of the bitlines, where each of the capacitances can be substantially equal in value to each other of the capacitances.

REFERENCES:
patent: 4242736 (1980-12-01), Raffel et al.
patent: 4833518 (1989-05-01), Matsuda et al.
patent: 4905068 (1990-02-01), Satoh et al.
patent: 4922460 (1990-05-01), Furutani et al.
patent: 5214601 (1993-05-01), Hidaka et al.
patent: 5325336 (1994-06-01), Tomishima et al.
patent: 5426615 (1995-06-01), Tomishima et al.
patent: 5485419 (1996-01-01), Campbell
patent: 5495440 (1996-02-01), Asakura
patent: 5581126 (1996-12-01), Moench
patent: 5602793 (1997-02-01), Tomishima et al.
patent: 5610871 (1997-03-01), Hidaka
patent: 5671173 (1997-09-01), Tomita
patent: 6016390 (2000-01-01), Mali et al.
patent: 6646312 (2003-11-01), Kikuchi
patent: 2002/0064075 (2002-05-01), Morishima
patent: 2002/0105826 (2002-08-01), Yamauchi
patent: 2002/0182844 (2002-12-01), Igarashi
patent: 363133394 (1988-06-01), None
patent: 363187494 (1988-08-01), None
patent: 405198178 (1993-08-01), None

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