Power holdup circuit with increased power factor

Electricity: power supply or regulation systems – Input level responsive – Using a linearly acting final control device

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

06788040

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to systems for controlling line voltage, and more particularly to a circuit for maintaining power factor during line voltage dropouts in, for example, power conversion equipment.
BACKGROUND OF THE INVENTION
Power factor relates generally to the efficiency of a system in using power and is preferably maintained at a high level (i.e., 0.9 or higher) to minimize loses. In particular, power factor defines the relationship between the actual/active or real power being used by the system (i.e., measured in kilo-Watts (KW)) and the total power supplied and available to the system. Further, total power is defined by apparent power (i.e., measured in volt-amps (VA)), which includes a non-working component (i.e., reactive power (kVAR)). Thus, it is desirable to reduce, as much as possible, the reactive power component. Reactive power is generally not useful power, and typically provides for sustaining the electromagnetic field in systems.
Specifically, power factor is a value between 0 and 1, and represents the amount of power actually being used (i.e., real power divided by apparent power) by a device or system. A high power factor indicates that a system is using power efficiently, while a low power factor indicates that a system in using power less efficiently. Thus, when the power factor is 1, real power and apparent power are equal, with the system using power at 100% efficiency. However, when the current from a power source includes harmonics, or when it is not in phase with the voltage (e.g., reactive device), the power factor of the system is reduced (i.e., less than 1), thus indicating a less efficient system.
For example, reactive power may be caused by a phase shift between AC current and voltage in inductors and capacitors within a system. With respect to inductors causing phase shift, current is said to lag behind voltage, and in capacitors causing phase shift, current is said to lead voltage. Typically, when inductive loads cause lagging in a system, appropriate capacitors are used to correct and offset the lagging effect (i.e., increase power factor).
Depending upon the power supplier, the cost of receiving power may increase if power factor is not sustained at a specific minimum level (i.e., 0.9). Further, because power factor represents power that could be used, but is not, increasing the use of the available power will reduce overall cost. Additionally, larger wiring and transformers may be needed when power factor is low. Thus, a low power factor may have numerous negative effects on different aspects of a system.
Further, government regulations for certain power conversion equipment require high power factors (i.e., above 0.9). Additionally, regulations for semiconductor processing equipment also require sustaining power sources through line voltage dropouts, which further require energy storage elements at the power supply input that may need power correction.
Power factor correction (PFC) devices are known that provide for maintaining power factor at higher levels, typically above 0.85, and particularly during line voltage dropouts. Both passive and active devices have been developed in an attempt to increase and maintain the power factor of a system at a high level. In a passive approach, an inductor is provided at the input of the circuit or system, usually ahead of an electrolytic capacitor bank. This helps to reduce harmonic distortion within the system and allows equipment to obtain a power factor of between about 0.8 and 0.9. However, the inductance value required increases exponentially with the power factor improvement desired. When a power factor above 0.9 is desired or required, the size and weight of the inductor becomes prohibitive.
Active approaches include boost, buck or flyback converters in connection with monitoring devices that monitor various variables within the system. In particular, the input voltage, the output voltage and current at the input of the system are monitored to maintain the power factor. However, although these PFC devices sustain power through a line voltage dropout and provide higher power factors (i.e., about 0.9), these devices are complex, resulting in their size and cost increasing significantly. Reliability of the system also may be reduced with the addition of these complex control components.
Thus, there exists a need for a system for maintaining power during a line voltage dropout that is less complex in design, lower in cost and that provides a higher power factor.
SUMMARY OF THE INVENTION
The present invention generally includes a circuit and method of providing the same that has holdup capability with a high power factor during line voltage dropout. The circuit is less complex in design and requires no external monitoring and control for providing the holdup capability. The present invention monitors the input voltage to a system and switches to a holdup power source when needed (e.g., during a single cycle line voltage dropout). Power from the primary source (i.e., line voltage) is restored after the dropout condition ends. The holdup power source is appropriately charged based upon the input power source to the system and the requirements of the system.
Specifically, in one embodiment of the present invention, a power holdup circuit of the present invention having a high power factor (e.g., about 0.9 or higher) generally includes monitoring means for monitoring input voltage and specifically, the difference between a power supply voltage and a holdup capacitor voltage, and switching means for turning on the holdup power source when the difference between the power supply voltage and holdup capacitor voltage exceeds a predetermined threshold voltage. The switching means may include a diode and a transistor, with the predetermined threshold voltage defined by the voltage rating of the diode plus the turn-on voltage of the transistor. The power holdup circuit may be turned on (i.e., switched on) when the difference between the power supply voltage and the holdup capacitor voltage exceeds the predetermined threshold voltage.
The diode may be a zener diode and the transistor may be a metal-oxide-silicon field-effect transistor. Further, the holdup capacitor may be precharged to a predetermined level and charges through a diode of the transistor. A precharge resistor also may be provided to limit the peak current for charging the holdup capacitor. The power holdup circuit may be configured such that the monitoring and switching means provide a power factor of not less than about 0.9.
In another embodiment of the present invention, an input circuit adapted for maintaining power factor during line voltage dropout of a rectified alternating current source includes holdup means having stored power for use during voltage dropout, and control means for monitoring the difference between the voltage of the rectified alternating current source and the voltage of the holdup means. The control means is adapted to switch power from the rectified alternating current source to the holdup means when the difference exceeds a predetermined value.
The holdup means may include a capacitor adapted to be charged to the peak voltage value of the rectified alternating current source. The holdup means may further include a precharge resistor adapted for limiting the charging current to the capacitor. The control means also may include a diode and a transistor, with the predetermined value defined by the voltage rating of the diode plus the turn-on voltage of the transistor. The transistor may include a diode (e.g., body diode), which is adapted to precharge the capacitor.
The control means may be adapted to switch on backup power storage when the voltage of the holdup means reaches a predetermined minimum value defined by the turn-on voltage of the transistor. The holdup means and control means also may be adapted for operation with both a single-phase and a three-phase rectified alternating current source.
A method of the present invention for maintaining power factor when voltage

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Power holdup circuit with increased power factor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Power holdup circuit with increased power factor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power holdup circuit with increased power factor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3196269

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.