Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2002-02-04
2004-06-08
Zarneke, David A. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C174S261000, C174S266000, C361S792000, C361S795000
Reexamination Certificate
active
06747216
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains in general to circuit design and in particular to creating and utilizing conductive trenches to improve power delivery, EMI suppression, and/or thermal dissipation within a circuit structure.
BACKGROUND OF THE INVENTION
As printed circuit board designs have increased in complexity, the need for additional interconnect lines between the components coupled to the printed circuit boards have increased. To address this need, manufactures have provided multiple layer printed circuit boards where several layers of conductors are separated by layers of dielectric material. Printed circuit boards (PCBs) generally contain four or more conductive layers, where at least one conductive layer is a ground plane, one or more conductive layers are power planes and outer conductive layers that provide a high density interconnect for coupling various components or sockets, which have been mounted to the PCB. These multiple layer circuit boards are fabricated such the conductive layers are each separated by a dielectric layer so that the intermediate conductor layers providing power and the ground planes to the printed circuit board are not in contact except by vias.
FIG. 1
illustrates a multiple layer printed circuit board where layered beneath the interconnect layers (not shown) is a first metalized layer to provide power, and a second metalized layer to provide ground and where the two metalized layers are separated by a dielectric layer (removed for clarity). A clearance space in a metalized layer may be provided around a via to avoid connecting with that layer.
The conductive layers of the multiple layer printed circuit boards can be connected to each other using vias, which are plated with conductive material to provide plated through holes. The vias are located across the printed circuit board and connected to mounting locations on the outer conductive planes using conductive traces. That is, mounting pads for integrated circuits and surface mount components may not be directly connected to plated through holes, but can be connected to the plated through hole locations using a patterned conductive trace. With the increased population density of integrated circuits, concerns about electromagnetic interference (EMI), power/heat dissipation, and power delivery increase.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a printed circuit board which addresses the above concerns while maintaining current circuit board assembly quality, including solder joints.
REFERENCES:
patent: 5304743 (1994-04-01), Sen et al.
patent: 5426399 (1995-06-01), Matsubayashi et al.
patent: 5714718 (1998-02-01), Tanaka
patent: 5828555 (1998-10-01), Itoh
patent: 5912809 (1999-06-01), Steigerwald et al.
patent: 6000120 (1999-12-01), Arledge et al.
patent: 6444922 (2002-09-01), Kwong
patent: 2002/0130739 (2002-09-01), Cotton
Brist Gary A.
Long Gary Baxter
Sato Daryl A.
Patel I B
Zarneke David A.
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