Power factor correction method with zero crossing detection...

Electricity: power supply or regulation systems – In shunt with source or load – Using choke and switch across source

Reexamination Certificate

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Details

C323S235000, C323S284000, C323S288000

Reexamination Certificate

active

06756771

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor devices and structure.
In the past, the semiconductor industry utilized various structures and methods to form power factor correction circuits. The power factor was generally recognized as a measure of the difference between the voltage and current waveforms of an alternating current (AC) waveform. Differences between the current and voltage waveforms resulted in low efficiency utilization of the supplied AC power. Power factor correction circuits were utilized to more closely align the shape of the current and voltage waveforms in order to provide higher efficiency. Examples of power factor correction circuits are disclosed in U.S. Pat. No. 5,134,355 issued to Roy Alan Hastings on Jul. 28, 1992; U.S. Pat. No. 5,359,281 issued to Barrow et al on Oct. 25, 1994; and U.S. Pat. No. 5,502,370 issued to Hall et al on Mar. 26, 1996 all of which are hereby incorporated herein by reference.
FIG. 1
illustrates a simplified schematic of a portion of a prior art power factor correction circuit
100
that had some similar functionality to the above referenced patents. Circuit
100
received an AC input voltage on inputs
112
and
113
and operated a switching transistor
101
to generate a DC output voltage on outputs
117
and
118
. An error amplifier
102
and multiplier
103
operated together to form an AC reference voltage on an output
104
of multiplier
103
. A current shaping block and a logic and control section used the AC reference voltage to control transistor
101
. The control signals to transistor
101
were designed to modify the input current from inputs
112
and
113
in a manner that made the shape of the input current waveform closely match the shape of the input voltage waveform in order to provide a power factor that approached a unity value.
One problem with the previous power factor control circuits was the transient response time. In order to provide low distortion in the input current waveform, the control loop of circuit
100
had a very slow response time. In order to prevent input noise from affecting the output voltage, the bandwidth of the control loop generally was about ten times less than the frequency of the rectified AC input voltage. Typically the bandwidth was limited to about ten to twelve Hz (10-12 Hz). Because of the low bandwidth of the control loop and the low bandwidth resulting from the compensation of amplifier
102
, circuit
100
had a slow response to transient voltages on inputs
112
and
113
which often resulted in an over-voltage or under-voltage condition at outputs
117
and
118
. The over-voltage condition could result in damage to the load connected to outputs
117
and
118
, while the under-voltage condition could result in shutdown of the load. Such transients often occurred and were very common at start-up.
Accordingly, it is desirable to have a method of forming a power factor correction device that has a wider loop bandwidth, that has an error amplifier that quickly responds to transients, and that provides greater protection for loads connected to the power factor correction device.


REFERENCES:
patent: 5134355 (1992-07-01), Hasgings
patent: 5359281 (1994-10-01), Barrow et al.
patent: 5502370 (1996-03-01), Hall et al.
patent: 5790395 (1998-08-01), Hagen
patent: 5818707 (1998-10-01), Seong et al.

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