Power factor correction method and apparatus

Electricity: power supply or regulation systems – In shunt with source or load – Using choke and switch across source

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363 60, G05F 156, H02M 318

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active

060436336

ABSTRACT:
A method and apparatus for controlling a boost converter, which offers improved power factor correction by compensating for the distorting effects of parasitic capacitance and parasitic oscillations. By precise adjustments to the closing time of the boost switch, the effects of parasitic capacitance can be reduced or eliminated. A zero current detector capable of detecting both forward and reverse zero current points facilitates the compensation. The method and circuit of the present invention are well-suited to integration with an inexpensive digital controller such as a microprocessor, and a method of dithering to enhance the time resolution of clocked digital circuits is presented.

REFERENCES:
patent: 5359274 (1994-10-01), Bandel
patent: 5594323 (1997-01-01), Herfurth et al.
patent: 5614811 (1997-03-01), Sagalovich et al.
patent: 5757635 (1998-05-01), Seong
Andreycak, B., "Power Factor Correction Using the UC3852 Controlled On-Time Zero Current Switching Tecxnique", Unitrode Application Note, pp 10-269-10-275, no futher information given.
Alberkrack et al, "An Economical Controller Corrects Power Factor", Power Conversion, pp 322-329, Sep. 1992 Proceedings.

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