Power factor correction control circuit

Electric power conversion systems – Current conversion – With condition responsive means to control the output...

Reexamination Certificate

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Details

C363S044000, C323S222000, C323S284000

Reexamination Certificate

active

06259614

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to power factor correction for AC to DC power converters, and more specifically, to AC to DC power converters having power factor correction circuitry utilizing a minimal component count and minimal IC pin count without loss of performance.
2. Brief Description of the Related Art
In most AC to DC power converters, it is convenient to have the circuit act as a pure resistor to the AC input line voltage. To achieve this, active power factor correction (PFC) can be implemented which, for an AC input line voltage, produces an AC input line current.
It also is important to produce a sinusoidal input current which has a low total harmonic distortion (THD). THD and power factor (PF) represent performance measurements of how well the PFC circuit works. A power factor (PF) of 1.0 represents the highest achievable, and a THD lower than about 15% is acceptable in practice.
A typical solution for providing active power factor correction is shown in circuit
2
of FIG.
1
. Circuit
2
has a boost-type converter topology and a PFC IC
4
such as the Motorola 34262. The resulting circuit requires a voltage divider network (resistors
6
and
8
and capacitor
10
) for sensing the AC rectified line input. Additionally, a secondary winding on the boost inductor
12
detects the zero-crossing of the inductor current. Also, a current sensing resistor
14
in the source of the boost switch
16
shapes the peak inductor current and detects an over-current condition. A voltage-divider network (resistors
18
and
20
) senses and regulates a constant DC bus voltage and detects an over-voltage condition due to load transients. A compensation capacitor
22
is required for a stable loop response.
Accordingly, the need exists in the prior art for implementation of a simpler active power factor correction (PFC) circuit having fewer components.
SUMMARY OF THE INVENTION
The present invention overcomes the deficiencies of the prior art by providing a new control method that results in a minimal component count, minimal IC pin count, and the same performance as standard PFC ICs available on the market.
The power factor control circuit of the present invention includes an inductor for receiving AC rectified power and a switch for charging/discharging the inductor. A switching circuit connected to the inductor controls the on-time of the switch, and thereby the charging time of the inductor, by comparing a DC bus voltage to a fixed reference voltage. The switching circuit also controls the off-time of the switch, and thereby the discharging time of the inductor, by turning the switch off until the inductor current discharges to zero, as detected by the switching circuit, such that the off-time of the switch varies as a function of the peak inductor current during each switching cycle. Preferably the switch is a MOSFET, and the inductor includes a secondary winding which is used by the switching circuit to determine the inductor current.
Advantageously, the MOSFET operates without a current-sensing resistor connected in series with the source of the MOSFET. Further, the on-time of the switch is modulated as a function of the off-time of the switch to achieve lower total harmonic distortion. In addition, the current in the inductor follows the sinusoidal voltage of the AC rectified power as the switching circuit is turned on and off at a much higher frequency than the line frequency of the AC rectified power, thereby eliminating the need to sense the rectified AC line input voltage.


REFERENCES:
patent: 5867379 (1999-02-01), Makisimovic et al.
patent: 5872430 (1999-02-01), Konopka
patent: 5912549 (1999-06-01), Farrington et al.
patent: 5986901 (1999-11-01), Weng
patent: 5991172 (1999-11-01), Jovanovic et al.
patent: 6043633 (2000-03-01), Lev et al.
patent: 6128205 (2000-10-01), Bernd et al.
patent: 6141230 (2000-10-01), Sum

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