Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
1999-11-23
2001-08-21
Graybill, David E. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S723000, C257S712000, C257S778000
Reexamination Certificate
active
06278179
ABSTRACT:
BACKGROUND OF THE INVENTION
Electronic power devices particularly intended for rail traction usually comprise a conductive substrate made of copper, for example, to which are attached composite conductor-insulator-conductor structures having a heat transfer and electrical insulation function. The conductive top layer of each composite structure constitutes a substrate on which diodes and insulated gate bipolar transistors (IGBT) are disposed in an arrangement that varies with the nature of the electronic device concerned. The power semiconductor circuits are fixed by tin-lead or tin-lead-silver soft solder.
The free faces of the diodes and the IGBT are covered by one or more connecting terminals to each of which are soldered aluminum wires which typically have a diameter in the order of 380 to 500 microns. The other end of each wire is soldered to the top conductive substrate of one of the composite structures forming an inverter arm.
The above design, which is well-known in the art, has some drawbacks, however. The above power electronic devices are complex to manufacture because they include a very large number of aluminum wires. Also, the overall surface area of these power devices is relatively large, which increases the overall volume of the assembled device and also causes spurious inductance phenomena which compromise its electrical operation.
OBJECT AND SUMMARY OF THE INVENTION
The object of the invention is to provide an electronic power device which can alleviate the drawbacks of the prior art referred to above. To this end, it consists in a power electronic device comprising a conductive substrate on which rests a first plane arrangement of semiconductor circuits formed by diodes and insulated gate bipolar transistors, said semiconductor circuits having connecting terminals, wherein said device comprises at least one second plane arrangement of semiconductor circuits, two adjacent plane arrangements being separated by a plane conductor array comprising at least one electrically conductive and heat dissipative busbar connected to terminals of circuits of a first arrangement, said busbar further supporting, on its face opposite the substrate, circuits of a second plane arrangement, at least one conductive member electrically insulated from said busbar being connected to other terminals of the circuits of said first arrangement and being disposed within the volume of said busbar.
According to other features of the invention:
an end plane arrangement of semiconductor circuits is covered by an end plane conductor array which comprises at least one electrically conductive and thermally dissipative end busbar connecting terminals of the circuits of said end arrangement and at least one end conductor member electrically insulated from said end busbar which is connected to other terminals of circuits of said end arrangement and is within the volume of the busbar;
the terminals of said plane arrangements are fixed to the respective plane arrays by soldering at least one tin-lead-silver boss;
said terminals are separated from the boss or each boss by a coating adhering to the boss or to each boss, in particular a titanium-nickel-gold deposit;
said at least one conductive busbar has at least one shoulder and thereby extends globally in a plane parallel to that of said substrate;
said substrate and said end busbar are parts of respective thermal transfer and electrical insulation composite structures;
said conductive busbar has notches receiving said conductive members;
the device forms an inverter arm and comprises identical first and second plane arrangements and first and second plane conductor arrays;
each of said plane arrays
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B) comprises at least one gate common to a row of insulated gate bipolar transistors in series;
said conductive busbars of said first plane array and said second plane array form emitters common to the insulated gate bipolar transistors of said first plane arrangement and said second plane arrangement, respectively.
REFERENCES:
patent: 5019946 (1991-05-01), Eichelberger et al.
patent: 5532512 (1996-07-01), Fillion et al.
patent: 44 03 996 A1 (1995-08-01), None
Alstom Holdings
Graybill David E.
Sughrue Mion Zinn Macpeak & Seas, PLLC
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