Power efficient transistor and method therefor

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device

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Details

327530, 327 80, 327432, H03K 5153, H03K 522

Patent

active

055460402

ABSTRACT:
A power efficient transistor (11) which operates in or near saturation having a base (16), a collector (17), and an emitter (18). A first transistor (12) having a base, collector, and emitter coupled to the base (16), collector (17), and emitter (18) of the transistor (11). The first transistor (12) is biased to operate in or near saturation under quiescent conditions. A plurality of transistors (13) are incrementally enabled or disabled to maintain the transistor (11) in or near saturation under all operating conditions. Each of the transistors (13) have a base, collector, and emitter coupled to the base (16), collector (17), and emitter (18) of the transistor (11). A plurality of drive transistors (14), enable or disable a corresponding one of each transistor of the transistors (13). Each drive transistor of the drive transistors (14) is enabled at a different voltage thereby incrementally enabling and disabling each transistor of transistors (13) maintaining transistor 11 in or near saturation.

REFERENCES:
patent: 3863169 (1975-01-01), Knight
patent: 4672235 (1987-06-01), Villa et al.

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