Power efficient multistage amplifier and design method

Details Power efficient multistage amplifier and design method Power efficient multistage amplifier and design method

2011-05-24

2011-05-24

Nguyen, Hieu P (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S133000, C330S150000

Reexamination Certificate

active

07948324

ABSTRACT:
A multistage amplifier and design method are disclosed. The multistage amplifier has a plurality of amplifier stages, each stage having an amplifier designed and biased to operate at or near the amplifier's power added efficiency (PAE) peak. The PAE peak of each of the amplifier is at or near the amplifiers linear-compression transition region, providing a multistage power amplifier that is power efficient and has desirable amplitude to amplitude and amplitude to phase power transfer characteristics. The amplifier is designed by matching the output impedance of a final stage with a load. Amplifier stages are iteratively designed from the last stage to the first. At each stage, an amplifier and drive circuit are designed. The drive circuit and amplifier are designed to provide each stage with output impedance matched to the input impedance of the following stage and to operate at or near the PAE peak of the amplifier.

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