Power down sense circuit

Details Power down sense circuit Power down sense circuit

1986-10-24

1987-12-29

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

455343, 364707, 365227, 358903, H04N 563

Patent

active

047164638

ABSTRACT:
A low voltage sense circuit for a microprocessor controlled television receiver includes a 5 volt regulator having a large electrolytic capacitor coupled across its output, which is the power input terminal of a microprocessor. The microprocessor includes a sleep terminal for initiating operation in a minimum power consumption mode. The 12 volt input to the 5 volt regulator is coupled to the bias circuit of a PNP transistor that includes a Zener diode and which is in saturation as long as the input voltage to the 5 volt regulator is greater than the breakdown voltage of the Zener diode. The collector output of the transistor is connected to the sleep terminal of the microprocessor. When the transistor is driven out of saturation, an appropriate voltage change is developed at the sleep terminal for causing the microprocessor to switch to its low power sleep mode.

REFERENCES:
patent: 4227257 (1980-10-01), Sato
patent: 4281349 (1981-07-01), George
patent: 4457021 (1984-06-01), Belisomi
patent: 4523295 (1985-06-01), Zato

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