Power distribution for full wafer package

Details Power distribution for full wafer package Power distribution for full wafer package

1987-12-17

1990-02-06

Gonzalez, Frank

357 79, 357 80, 357 81, H01L 2302

Patent

active

048992089

ABSTRACT:
A full wafer packing technique for semiconductor devices is provided. The semiconductor wafer is mounted on a substrate wherein the coefficient of thermal expansion of the substrate is matched to that of the wafer. The wafer is also provided with at least one bus member extending across the surface of the wafer to provide voltage power to the devices. Further, the packaging includes a cover, and a solid dielectric thermally conducting material which is disposed between and the wafer and substrate and fills the space between the cover and wafer and substrate.

REFERENCES:
patent: 3999105 (1976-12-01), Archey et al.
patent: 4000509 (1976-12-01), Jarvela
patent: 4595945 (1986-06-01), Graver
patent: 4672421 (1987-06-01), Lin

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