Power dissipation management for wired transceivers

Details Power dissipation management for wired transceivers Power dissipation management for wired transceivers

2006-10-31

2010-12-21

Trost, IV, William (Department: 2472)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S255000, C340S693100, C379S322000, C455S574000

Reexamination Certificate

active

07856028

ABSTRACT:
A system, method and apparatus for reducing a power consumed by a physical layer device (PHY). A length of a cable connecting the PHY to a link partner is determined. Based on the length, power provided to one or more components of the PHY, or any portion thereof, is reduced. The power provided is reduced while maintaining a level of reliability specified by a protocol governing operation of the PHY. The length can be determined using time-domain reflectometry (TDR) techniques. Any portion of an echo cancellation filter, a crosstalk filter, an equalizer, a precoder, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), a forward error correction (FEC) decoder and/or an FEC coder can be powered-down or power-optimized to reduce the overall power consumed by the PHY. The protocol governing operation of the PHY can be IEEE 802.3.

REFERENCES:
patent: 2001/0055331 (2001-12-01), Agazzi et al.
patent: 2003/0023920 (2003-01-01), Jeong et al.
patent: 2004/0015765 (2004-01-01), Cooper et al.
patent: 2004/0233324 (2004-11-01), Galambos et al.
patent: 2005/0262364 (2005-11-01), Diab et al.
patent: 2006/0181283 (2006-08-01), Wajcer et al.
patent: 2006/0188043 (2006-08-01), Zerbe et al.

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