Power device driving circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S109000, C327S100000

Reexamination Certificate

active

06756825

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to driving circuits of an inverter, and more particularly, to prevention of malfunctions of driving circuits of low-side switching devices.
2. Description of the Background Art
FIG. 6
is a circuit diagram showing a conventional single-phase inverter. Here, driving circuits and protection circuits of low-side switching devices
101
A and
101
B are illustrated, whereas those of high-side switching devices
102
A and
102
B are not illustrated.
The low-side switching devices
101
A,
101
B and high-side switching devices
102
A,
102
B are IGBTs (insulated gate bipolar transistors), to which diodes
103
A,
103
B,
104
A and
104
B are connected in parallel, respectively.
The emitter terminals of the low-side switching devices
101
A and
101
B are both grounded through an N bus (N), while the source terminals of the high-side switching devices
102
A and
102
B are both connected to a power source
105
through a P bus (P). The source terminals of the low-side switching devices
101
A and
101
B and the emitter terminals of the high-side switching devices
102
A and
102
B are all connected to a load.
Next, the low-side switching devices
101
A and
101
B are each connected to a driving circuit and a protection circuit. The driving circuits are formed by input buffers
106
A,
106
B and emitter follower circuits
107
A,
107
B,
108
A and
108
B. Control signals to the respective switching devices
101
A and
101
B are amplified in voltage at the input buffers
106
A and
106
B, respectively, and are supplemented in current driving capability at the emitter follower circuits
107
A,
108
A and at
107
B,
108
B, respectively, to be inputted to the base terminals of the low-side switching devices
101
A and
101
B, respectively. Resistors
109
A and
109
B are provided between the emitter follower circuit
108
A and the base terminal of the low-side switching device
101
A, and between the emitter follower circuit
108
B and the base terminal of the low-side switching device
101
B, respectively, while resistors
110
A and
110
B are provided between the emitter follower circuit
107
A and the base terminal of the low-side switching device
101
A, and between the emitter follower circuit
107
B and the base terminal of the low-side switching device
101
B, respectively.
The protection circuits are formed by input buffers
111
A,
111
B and resistors. The driving circuits and protection circuits connected to these low-side switching devices
101
A and
101
B are all connected to a common power source
112
. A ground line of the driving circuits and protection circuits is connected to the emitter terminals of the low-side switching devices
101
A and
101
B. Thus, the N bus (N) and ground line of the driving circuits and protection circuits form an electric loop through the emitter terminals of the low-side switching devices
101
A and
101
B. Further, a power line of the driving circuits and protection circuits is connected to the ground line through power by-pass capacitors
113
A,
113
B,
114
A and
114
B.
The emitter terminals of the low-side switching devices
101
A and
101
B are each connected to the N bus (N). On this N bus (N), self-inductances
115
A and
115
B are present. Thus, switching of the low-side switching devices
101
A and
101
B changes the amount of current running through the N bus (N), causing a surge voltage to occur. The surge voltage changes the potential of the ground line of the driving circuits and protection circuits which form the electric loop, and also changes the voltage of the power line of the driving circuits and protection circuits connected through the power by-pass capacitors
113
A,
113
B,
114
A and
114
B. This causes the driving circuits and protection circuits to malfunction.
In the case where the driving circuits and protection circuits connected to the switching devices of the inverter are connected to the common power source
112
and the ground line of the driving circuits and protection circuits and the N bus (N) form an electric loop as described above, the occurrence of a surge voltage due to the self-inductances present on the N bus (N) causes variations in the voltage of the ground line and power line of the driving circuits and protection circuits, causing the driving circuits and protection circuits to malfunction.
Conventionally, there has been a method of providing a power source for each of driving circuits and protection circuits of low-side switching devices in order to solve the aforementioned drawbacks.
FIG. 7
is a circuit diagram showing a single-phase inverter in which driving circuits and protection circuits are each provided with a power source. The low-side switching devices
101
A,
101
B, high-side switching devices
102
A,
102
B, driving circuits and protection circuits shown in
FIG. 7
have the same configuration as those shown in FIG.
6
.
The driving circuit and protection circuit of the low-side switching device
101
A are connected to a power source
116
A, while those of the low-side switching device
101
B are connected to a power source
116
B. This is the difference from the configuration shown in FIG.
6
. With the configuration shown in
FIG. 7
, the ground line of the driving circuits and protection circuits and N bus (N) do not form an electric loop. Thus, a surge voltage as generated does not change the voltages of the ground line and power line of the driving circuits and protection circuits, preventing the driving circuits and protection circuits from malfunctioning.
With the configuration shown in
FIG. 7
, however, the low-side switching devices and high-side switching devices each require a power source. For instance, a three-phase inverter requires six low-side switching devices and high-side switching devices in total, thus requiring six power sources in total. Therefore, drawbacks arise such as cost increase due to provision of additional power sources, upsizing of power sources and increase in interconnection between power sources, driving circuits and protection circuits.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an inverter driving circuit capable of preventing a malfunction due to a surge voltage without upsizing circuits or increasing costs.
According to the present invention, a power device driving circuit includes a plurality of low-side switching devices, a plurality of driving circuits, a power source, an interconnect wire and a first resistor. The plurality of low-side switching devices form an inverter circuit, each having one terminal connected to a load and the other terminal connected to a common low-potential line. The plurality of driving circuits are configured to drive the plurality of low-side switching devices, respectively. The plurality of driving circuits are commonly connected to the power source. The interconnect wire is configured to connect the plurality of driving circuits and the power source, and to form an electric loop with the low-potential line through the plurality of low-side switching devices. The first resistor is provided on the interconnect wire between the plurality of driving circuits and the power source.
Since the power device driving circuit includes the resistor on the interconnect wire between the plurality of driving circuits and the power source, a surge current is unlikely to run through the interconnect wire, which can prevent the driving circuits and protection circuits from malfunctioning.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5233329 (1993-08-01), Lippmann et al.
patent: 5686854 (1997-11-01), Smith
patent: 5689407 (1997-11-01), Marinus et al.
patent: 5696431 (1997-12-01), Giannopoulos et al.
patent: 6057729 (2000-05-01), Nomura
patent: 8-126351 (1996-05-01), None
patent: 2596774 (1999-04-01), None

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