Electric power conversion systems – Current conversion – With condition responsive means to control the output...
Reexamination Certificate
2000-05-15
2001-05-15
Sterrett, Jeffrey (Department: 2838)
Electric power conversion systems
Current conversion
With condition responsive means to control the output...
C363S021070
Reexamination Certificate
active
06233165
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to power supplies and, in particular, to power supplies suitable for operating from a high voltage supply input and for powering low-voltage-rated circuitry.
2. Description of the Related Art
In many applications where high voltages must be regulated or otherwise controlled in some manner, the circuitry for controlling the high voltages must be constructed to withstand high voltages. Since components with a high break-down voltage are expensive when compared to components with lower break-down voltages, there is an advantage is using low break-down voltage components.
FIG. 1
is a diagram of a conventional switching voltage regulator circuit which controls operation of a high voltage, but which uses low break-down voltage components. Further details regarding the construction and operation of the
FIG. 1
circuit are disclosed in U.S. Pat. No. 5,313,381 entitled “Three-Terminal Switched Mode Power Supply Integrated Circuit”.
As shown in
FIG. 1
, an AC supply of typically 110 to 120 volts at 50 or 60 Hz is applied to the input of a full wave bridge rectifier BR. One terminal of the output of rectifier BR, which is smoothed somewhat by a capacitor CF, is connected to the primary winding P
1
of a transformer T
1
. Current flow through the primary winding is controlled by an integrated circuit switching circuit
16
which includes a control circuit
14
and a high voltage FET F
1
. This switching causes an AC component to be introduced so that voltages will be produced at the transformer secondary windings Si and S
2
. FET F
1
can be implemented in discrete form or, together with control circuit
14
, as an integrated circuit.
Control circuit
14
includes pulse width modulation (PWM) circuitry which causes FET F
1
to periodically switch on and off at a frequency much higher than that of the AC input frequency. Thus, transformer T
1
can be made relatively small. Secondary winding S
1
is connected to a diode rectifier DA and filter capacitor CA. The DC output produced across capacitor CA is the primary DC power source to be regulated.
An error amplifier
12
compares the DC output with a reference voltage and produces an output based upon the comparison. The error amplifier output drives the input of an opto-coupler
18
which provides electrical isolation between the primary winding P
1
circuitry and the circuitry connected to the secondary winding S
1
. The output of the opto-coupler
18
is thus indicative of the magnitude of the DC output voltage relative to the desired regulated voltage. The opto-coupler output is used to control pulse width modulation circuitry of control circuit
14
so that the duty cycle of the current flow through the primary winding P
1
will either increase or decrease thereby altering the magnitude of the DC output voltage.
The switching circuit
16
, which forms part of the primary winding P
1
circuitry, typically must be powered by a source which is electrically isolated from the secondary winding circuitry S
1
. A dedicated secondary winding S
2
is provided having a rectifier diode DB and filter capacitor CB. The DC output Vbias is connected to the output of the opto-coupler
18
. The opto-coupler
18
is conductive a sufficient time to ensure that a capacitor CC remains charged to a voltage Vp. A regulator internal to controller
16
operates to provide an internal regulated voltage from voltage Vp for powering the integrated circuit controller
16
. Vp is modulated by error amplifier
12
, with the modulation information being used by the pulse width modulation circuitry in control circuit
14
to control the duty cycle of the primary winding P
1
current and thus the magnitude of the regulated DC output voltage.
When FET F
1
turns off, the inductance of the transformer primary P
1
will attempt to maintain a constant current, with the result being that the voltage across the primary abruptly reverses. The drain of FET F
1
, which is connected to the primary, will increase to a voltage which could easily reach twice the supply voltage. This increase in voltage is due to the combination of leakage inductance and reflected voltage of the secondary winding. Although FET F
1
is typically rated to withstand relatively high voltages, as opposed to the components which make up control circuit
14
, the FET could be damaged by the very high voltages which could be produced on winding P
1
.
In order to prevent damage to FET F
1
and related circuitry, circuits commonly referred to as a snubber network are typically used in applications such as shown in FIG.
1
.
FIG. 2
is a diagram of a conventional snubber network which can be used with the
FIG. 1
regulator and which limits the voltage across the primary Pi. When FET F
1
turns off, the drain voltage will increase in value until the voltage is greater than the supply voltage +V. Diode DC will begin to conduct so that capacitor CD will begin to become charged through resistor RB. Thus, depending upon the values of capacitor CD and resistor RB, the voltage excursion at the drain of F
1
is limited to perhaps 50 to 100 volts above the supply voltage +V. Resistor RA operates to discharge capacitor CD after the fly-back pulse has exhausted itself.
Referring again to
FIG. 1
, the magnitude of the supply voltage VP can be set to a relatively low value by selecting the number of turns in secondary winding S
2
. Thus, with the exception of transistor F
1
, the remainder of the circuit controller
16
can be implemented using low voltage circuitry and/or electrical components. However, transformer T
1
must include a secondary winding S
2
dedicated to producing the supply voltage for the circuit controller
16
while maintaining the necessary electrical isolation from the circuitry powered by the primary DC output voltage by winding S
1
. Thus, the cost and size of transformer T
1
are increased.
The present invention overcomes the above-noted shortcomings of the prior art by providing a low voltage output without the use of a dedicated secondary winding. The low voltage output can be powered by the voltage applied to the transformer primary so that electrical isolation is maintained. Further, the components used in implementing the invention can be made to carry out the snubber network function of FIG.
2
. These and other advantages of the present invention will become apparent to those skilled in the art upon a reading of the following Detailed Description of the Invention.
SUMMARY OF THE INVENTION
A power supply arrangement and related method are disclosed. A transformer is provided having a first terminal of a primary winding connected to a power source. A switching element, such as a transistor, is coupled between a second terminal of the primary winding and a power source common, and operates to switch the power source output. A power supply is provided, which in a preferred embodiment, operates to power control circuitry which controls the state of the switching element.
The power supply includes a first capacitor, having a first terminal coupled to the second terminal of the primary winding, and a diode having an anode coupled to a second terminal of the capacitor and a cathode coupled to a first node. A discharge element, such as a resistor or a diode, is coupled intermediate the anode of the diode and the power source common. A voltage regulator, such as a Zener diode, is coupled to the first node and configured to regulate a power supply output voltage. In the event a Zener diode or other shunt regulator is used, the first node operates as the power supply output. In the event a series pass or similar type of regulator is used, the power supply output is at a node separate from the first node.
REFERENCES:
patent: 5014178 (1991-05-01), Balakrishnan
patent: 5313381 (1994-05-01), Balakrishnan
patent: 5424932 (1995-06-01), Inou et al.
patent: 5621623 (1997-04-01), Kuriyama et al.
patent: 5812383 (1998-09-01), Majid et al.
patent: 5828558 (1998-10-01), Korcharz et al.
patent: 5862044 (1
Camenzind Hans R.
Irissou Pierre R.
ASIC Advantage Inc.
Girard & Equitz LLP
Sterrett Jeffrey
LandOfFree
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