Power converter apparatus

Details Power converter apparatus Power converter apparatus

2000-08-28

2001-08-07

Riley, Shawn (Department: 2838)

Electric power conversion systems

Current conversion

Including automatic or integral protection means

C363S141000

Reexamination Certificate

active

06272028

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATION
This application claims benefit of priority to Japanese Patent Application No. 11-251051 filed Sep. 6, 1999, the entire content of which is incorporated by reference herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a power converter apparatus that uses high-speed semiconductor switching devices and includes a snubber circuit for restraining a surge voltage, and especially to a wiring structure of the snubber citcuit.
2. Discription of the Background
In recent years, power semiconductor switching devices for power converters or power inverters remarkably advance inhigh-speedswitching. Forexample, GCT (Gate-communicated Thyristor) is a current gate trigger type of high-speed semiconductor switching device, and IGBT (Insulated Gate Bipolar Transistor) and IEGT (Injection Enhanced Gate Transistor) are voltage gate trigger types of high-speed semiconductor switching devices. These high-speed semiconductor switching devices, which are capable of switching a voltage of 3-6 KV (Kilo-Volts) and a current of 3-4 KA (Kilo-Amperes), have been developed and made practical. Further, since a dV/dt resistance of a semiconductor switching device atatime of turningoff has been improved, it is attempted that a snubber circuit is made smaller in size and less loss.
FIG. 1
is a circuit diagram showing a conventional NPC (Neutral Point Clamped) inverter that uses GTO (Gate Turn-off Thyristor) as a semiconductor switching device. Snubber circuits
2
a,
3
a,
4
a
and
5
a
are respectively connected to GTO switching devices
2
,
3
,
4
and
5
. Each of the snubber circuits
2
a
-
5
a
restrains a surge voltage generated at switching the GTO switching devices
2
-
5
and includes a capacitor, a diode and a resistor.
In recent years, as highly efficient GCT, IGBT and IEGT are put to practical use, a cramp snubber circuit or a capacitor are come to be connected to a DC (Direct Current) power source. These high-speed semiconductor switching devices are able to switch off acurrent of several KA (Kilo-Amperes) up to 0 (zero) in 1-2 micro-seconds as a matter of their behavior. At the time of switching off a large current, a surge voltage represented by the product of a wiring inductance and a rise rate of current (dI/dt) is generated. If a peak of the surge voltage or a rise rate of voltage (dV/dt) are beyond capacity to resist voltage of a semiconductor switching device, the semiconductor switching device may be broken for ever. Therefore, it is important that the surge voltage be less than the capacity to resist voltage of the semiconductor switching device.
However, in a large capacity type of power converter that uses high-speed semiconductor switching devices, since either one of a charge and discharge snubber circuit or a clamp snubber circuit is connected to each of the semiconductor switching devices, the power converter becomes large in size and costly. Accordingly, it is desired to provide a device to restrain a surge voltage by only cramp snubber circuit connected to a DC power source in the same way as a power converter using semiconductor switching devices having small capacity to resist voltage. That is, it is desired to provide a device to restrain a surge voltage without attaching a snubber circuit to each of the semiconductor switching devices.
SUMMARY OF THE INVENTION
Accordingly, one object of this invention is to provide a power converter apparatus which may reduce a surge voltage generated at switching a semiconductor switching device and protect the semiconductor switching device from the surge voltage.
The present invention provides a power converter apparatus, including a DC power source, a semiconductor stack, connected to the DC power source in parallel, having a plurality of semiconductor devices and a cooler for refrigerating the semiconductor devices, the semiconductor devices and the cooler are stacked and pressured to each other, and a snubber circuit, connected to the DC power source in parallel, having a serial circuit of a capacitor and a diode, and a resistor connected in parallel to the diode, one terminal of the capacitor is disposed adjacent to the semiconductor stack so that magnetic flux generated by current flowing in the terminal cancels magnetic flux caused by current flowing in the semiconductor stack.


REFERENCES:
patent: 5638266 (1997-06-01), Horie et al.
patent: 7-56629 (1990-02-01), None
patent: 11-89249 (1999-03-01), None

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