Electric power conversion systems – Current conversion – Including automatic or integral protection means
Reexamination Certificate
2001-02-28
2002-02-26
Riley, Shawn (Department: 2838)
Electric power conversion systems
Current conversion
Including automatic or integral protection means
Reexamination Certificate
active
06351399
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power converter including a plurality of semiconductor element rows each having a plurality of semiconductor elements connected to one another in series. The semiconductor element rows are connected to one another in parallel and at least one of the semiconductor elements in each semiconductor element row is a switching semiconductor element. More particularly, the present invention relates to an improvement of the switching semiconductor element.
2. Discussion of the Background
In recent years, semiconductor power modules in each of which a main circuit including switching semiconductor elements and a drive control circuit for controlling drive of the switching semiconductor elements of the main circuit are stored in a package as a power converter have been frequently used as a drive unit for controlling drive of an induction motor, a DC brushless motor, a switched reluctance (SR) motor, etc.
FIG. 11
is a circuit block diagram of an inverter for driving, as a background power converter, an induction motor which is a three-phase AC load. In
FIG. 11
, each of the reference numerals “
1
U”, “
1
V” and “
1
W” denotes an insulated-gate bipolar transistor (hereinafter, referred to as an “IGBT”) acting as a high-side switching semiconductor element in a semiconductor element row formed by a pair of switching semiconductor elements connected to each other in series. Further, each of the reference numerals “
2
U”, “
2
V” and “
2
W” denotes an IGBT acting as a low-side switching semiconductor element connected to each of the IGBTs
1
U,
1
V and
1
W in series. Reference numerals “
3
U”, “
3
V” and “
3
W” denote flywheel diodes, which are respectively connected to the IGBTs
1
U,
1
V and
1
W in parallel, while reference numerals “
4
U”, “
4
V” and “
4
W” denote flywheel diodes, which are respectively connected to the IGBTs
2
U,
2
V and
2
W in parallel.
A U-phase semiconductor element row is formed by the IGBTs
1
U and
2
U and the flywheel diodes
3
U and
4
U and a V-phase semiconductor element row is formed by the IGBTs
1
V and
2
V and the flywheel diodes
3
V and
4
V. Meanwhile, a W-phase semiconductor element row is formed by the IGBTs
1
W and
2
W and the flywheel diodes
3
W and
4
W. In addition, connecting opposite end portions of these semiconductor element rows to one another, respectively, an inverter bridge is formed in which the U-phase, V-phase and W-phase semiconductor element rows are connected to one another in parallel.
Meanwhile, a main circuit
5
is formed in which in the U-phase, V-phase and W-phase semiconductor element rows connected to one another in parallel, a junction of collectors C of the IGBTs
1
U,
1
V and
1
W is set as a high-potential input terminal P and a junction of emitters E of the IGBTs
2
U,
2
V and
2
W is set as a low-potential input terminal N such that a series junction of the IGBTs
1
U and
2
U, a series junction of the IGBTs
1
V and
2
V and a series junction of the IGBTs
1
W and
2
W are respectively set as output terminals U, V and W.
Further, a DC main power source
6
is connected in parallel to a smoothing capacitor
7
such that a positive pole and a negative pole of the DC main power source
6
are respectively connected to the input terminal P and the input terminal N. A three-phase induction motor
8
acting as a load of the main circuit
5
is also connected to the output terminals U, V and W. Meanwhile, each of characters “Lu”, “Lv” and “Lw” denotes a parasitic inductance in a line connecting an emitter E of each of the IGBTs
2
U,
2
V and
2
W and the input terminal N.
A DC control power source
9
supplies electric power to input circuit sections of drive control circuits
10
U,
10
V and
10
W provided for the IGBTs
2
U,
2
V and
2
W, respectively. An amplifier
11
forms the input circuit section of the drive control circuit
10
U so as to amplify and output a control signal input from an input terminal INu. A photocoupler
12
is formed by a light emitting diode LED and a phototransistor PT. An input signal output from the amplifier
11
is input to the light emitting diode LED via a protective resistance
13
and is output through its insulation, as an insulation signal, from the phototransistor PT. Namely, the photocoupler
12
employs a collector C of the phototransistor PT, which is connected to a load resistance
14
, as an output terminal for the insulation signal.
Further, a drive circuit
15
forms an output circuit section of the drive control circuit
10
U and receives and amplifies the insulation signal output from the photocoupler
12
so as to output a drive voltage signal to a gate G of the IGBT
2
U via a gate resistance
16
. A DC drive power source
17
U for supplying electric power to the output circuit section of the drive control circuit
10
U supplies electric power not only to the phototransistor PT by way of the load resistance
14
, but also to the drive circuit
15
.
As described above, the drive control circuit
10
U for controlling a drive of the IGBT
2
U in response to an input of the control signal from the input terminal INu is formed by the amplifier
11
, the photocoupler
12
, the protective resistance
13
, the load resistance
14
, the drive circuit
15
and the load resistance
16
. In addition, the drive control circuit
10
V for controlling a drive of the IGBT
2
V in response to an input of a control signal from an input terminal Inv, and the drive control circuit
10
W for controlling a drive of the IGBT
2
W in response to an input of a control signal from an input terminal INw each have a similar arrangement. The single DC control power source
9
is provided in common as a drive power source of the input circuit sections of the drive control circuits
10
U,
10
V and
10
W. However, the DC drive power sources
17
U,
17
V and
17
W are respectively inserted into the output circuit sections of the drive control circuits
10
U,
10
V and
10
W as their drive power sources.
The operation of the background inverter shown in
FIG. 11
will now be described. Initially, a pulse width modulation (PWM) control circuit (not shown) is provided for outputting PWM signals for performing a variable speed control of the three-phase induction motor
8
acting as the load. Further, the PWM signals (i.e., the control signals of the PWM control circuit) are respectively input to the input terminals INu, INv and INw of the drive control circuits
10
U,
10
V and
10
W. The control signal input to the drive control circuit
10
U is amplified by the amplifier
11
and is input to the light emitting diode LED of the photocoupler
12
through the protective resistance
13
so as to be output through its insulation, as the insulation signal, from the phototransistor PT. The insulation signal output from the collector C of the phototransistor PT, which is connected to the load resistance
14
, is amplified by the drive circuit
15
and is input, as the drive voltage signal, to the gate G of the low-side IGBT
2
U so as to perform on-off drive of the IGBT
2
U. The drive control circuits
10
V and
10
W are also operated similarly so as to perform on-off drive of the IGBTs
2
V and
2
W, respectively. Likewise, the high-side IGBTs
1
U,
1
V and
1
W are also subjected to on-off drive by corresponding drive control circuits (not shown) respectively such that a variable speed control of the three-phase induction motor
8
is performed by PWM control.
In addition, the background inverter shown in
FIG. 11
is arranged and operated as described above. Negative poles of the output circuit sections of the drive control circuits
10
U,
10
V and
10
W should essentially have an identical potential and may be operated by a single power source. However, variations of reference potentials of the IGBTs
2
U,
2
V and
2
W may be caused by generating an induced voltage such as a surge voltage upon opening or closing of the IGBTs
2
U,
2
V and
2
W due to the parasitic inductances Lu, Lv and Lw in the lines c
Hatae Shinji
Hiyama Kazuaki
Hussein Khalid Hassan
Takanashi Ken
Tametani Fumitaka
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