Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2000-10-26
2002-06-25
Berhane, Adolf Deneke (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
Reexamination Certificate
active
06411070
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power control apparatus for controlling power-on or power-off of each circuit block in a system containing a plurality of circuit blocks.
This application is based on a Japanese Patent Application No. Hei 11-310345 filed in Japan, the content of which is incorporated herein by reference.
2. Description of the Related Art
Conventionally, to control power-on or power-off for each circuit block in a system containing a plurality of circuit blocks, some apparatus has been known to require the user or the sequencer to decide to turn on or off each of the power blocks, and based on such decisions, a controller, such as CPU that controls the operation of the overall system, is used to control the power supplied to each circuit block.
In such a system, the user or the sequencer initially decides whether to use each circuit block having a specific function such that those circuit blocks that will not be used are turned off (power-down) individually and the circuit block that is decided to be used by the user or the sequencer are turned on. To operate a circuit block, it is essential that the environment of the circuit block, such as the state of the clock signal input in the circuit block, satisfies the conditions required to operate this circuit block.
The conditions for the environment of the circuit block to operate are not satisfied, for example, when the clock signal that has been input in the circuit. block to operate the circuit block is inactive, information such as error status is sent back from the circuit block to the user or the sequencer, so that the user or the sequencer must again send a command to stop the operation of the circuit block. As such, the circuit block may be powered down in accordance with the command. Here, an inactive clock signal means that the voltage level of the clock signal is fixed at either the H-level or L-level, for example.
However, according to such a method of processing, when the environment of the circuit block does not satisfy the conditions to operate the circuit block, for example, when the clock signal input in the circuit block is inactive, (for example, the clock signal is fixed at either the H-level or L-level), it is not possible to immediately power down the circuit block in a real-time manner.
That is, when powering down, it is inevitable for the user or the sequencer to suffer the inconvenience of the prior art proceeding. For this reason, when the environment for operating the circuit block is not satisfied, some time (delay interval) is required until the circuit block is powered down. As a result, the circuit block maintained in the operational state (not powered down) during this delay interval causes wasteful consumption of electrical power.
Conversely, if an attempt is made to power down the circuit block in real-time using the structure of the conventional technology, it is necessary to frequently check the environmental conditions, such as clock signal, by using the controller, such as CPU.
If a quick power-down cannot be carried out when the clock signal input in the circuit block is inactive as in the above-mentioned conventional technology (ex., if this circuit block is a dynamic circuit in an LSI semiconductor) while the power is being supplied to the dynamic circuit, the clock signal to operate the dynamic circuit is stopped. In such a case, the electrical charge on the condenser in the dynamic circuit is discharged due to leaking, so that, an intermediate-potential point is created in the CMOS circuit in the dynamic circuit. As such, the intermediate potential causes a punch-through current in the CMOS circuit which results not only in consuming a large quantity of current but in creating a dangerous situation that the LSI circuit may be destroyed by the current.
SUMMARY OF THE INVENTION
The present invention is provided to resolve the problems presented above so that a power control apparatus powers down a circuit block immediately in a real-time manner, when the environment of the circuit block does not satisfy the conditions to enable the circuit block to operate, for example, when the clock signal input in a circuit block to operate the circuit block is inactive (for example, clock signal level is fixed at either the H-level or L-level).
According to the present invention, an object is achieved in a power control apparatus having a feature to discriminate whether an input signal in a circuit block to be controlled is active or inactive, and when the input signal is determined to be inactive, to output a power-down signal to power down the circuit block.
According to the above feature, when the power control apparatus determines that the input signal in the circuit block is inactive, i.e., when the conditions to operate the circuit block are not satisfied, a power-down signal is output immediately such that the circuit block can be powered down quickly to keep the power consumption of the circuit block to a minimum.
On the other hand, when the input signal to the circuit block is determined to be active, i.e., when the conditions for operating the circuit block are ready, the power-down signal can be released immediately so that the operation of the circuit block can be started immediately without time lag.
According to the present invention, it is possible to quickly and automatically discriminate whether the input signal to the circuit block is active or inactive, and, when the input signal is determined to be inactive, the circuit block can be powered down quickly. Therefore, the power consumed by the circuit block can be kept to a minimum. Furthermore, to perform this control, there is no need for the user or sequencer to perform laborious processing.
For example, if the present invention is used for the clock signal input section of an LSI circuit comprised by a dynamic circuit, even if the supply of operational clock to the dynamic circuit is suddenly stopped, it is possible to automatically power down the dynamic circuit. As such, there is no concern for problems such as punch-through current of the dynamic circuit. Accordingly, the dynamic circuit can be handled in the same manner as a static circuit, which facilitates the handling of the dynamic circuit.
Also, according to the present invention, the object is achieved in a power control apparatus having a feature that an input signal to the circuit block is a signal (for example, a clock signal) that alternates between a first voltage level and a second voltage level at a frequency that is less than a specific cycle.
According to the above structure, when the power control apparatus determines that the input signal in a circuit block is inactive, a power-down signal is output immediately so that the circuit block can be powered down quickly.
Also, when the circuit block is a dynamic circuit inside an LSI circuit, for example, supplying or stopping the clock signal can be handled in the same manner as for a static circuit. Therefore, there is no concern for problems such as punch-through current within the dynamic circuit. That is, according to the present invention, when the clock signal to the dynamic circuit is stopped, clock stopping is automatically detected and the dynamic circuit is powered down so that the punch-through problem does not arise.
According to one aspect of the present invention, a power control apparatus comprises a switch that turns on or off according to a voltage level of an input signal to the circuit block, a condenser whose charging current or discharging current is controlled by the switch, and a comparator to compare a voltage between both ends of the condenser with a specific reference voltage, and to output a power-down signal to power down the circuit block in accordance with a result of comparison.
According to the above structure, when an input signal input in a circuit block, becomes inactive, and the voltage level of the input signal is fixed at either the H-level or L-level, the switch is fixed at either on or off. Accordingly, th
Berhane Adolf Deneke
Yamaha Corporation
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