Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-03-28
2006-03-28
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S087000, C345S088000, C345S089000, C345S090000, C345S092000, C345S204000
Reexamination Certificate
active
07019726
ABSTRACT:
A plurality of gate lines connected to a gate driver for supplying gate signals and a plurality of drain lines connected to a drain driver for supplying drain signals are provided on a substrate. Pixels are formed in the regions surrounded by these lines. Each of the pixels includes a TFT, a storing circuit connected to the source of the FTF for storing a digital signal, and a signal selector for selecting a signal A or signal B in response to the signal stored in the storing circuit and supplying the selected signal to a display electrode. Once a digital signal corresponding to a display image is written to the storing circuit of each pixel, an image can be continuously displayed, even when operation of the drivers is stopped from the next frame, by continuing the operation of the storing circuit. Because the driver operation or the like can be suspended, overall power consumption can be reduced.
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Hogan & Hartson LLP
Sanyo Electric Co,. Ltd.
Shankar Vijay
Shapiro Leonid
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