Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with other solid-state active device in integrated...
Reexamination Certificate
2000-11-02
2002-11-12
Sherry, Michael (Department: 2829)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
Combined with other solid-state active device in integrated...
C257S162000, C257S504000
Reexamination Certificate
active
06479841
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the implementation, in monolithic form, of a detector of the state (on or off) of a power component. The present invention especially applies to a state detector for a medium power bidirectional ACS™ type switch which will be described hereafter.
2. Discussion of the Related Art
The most currents static bidirectional switches are triacs. A triac corresponds to the antiparallel association of two thyristors. It can thus be directly connected in an A.C. network, for example, the mains. The gate of a conventional triac corresponds to the cathode gate of at least one of the two thyristors forming it and is referenced to the electrode located on the front surface of this triac, that is, the surface that includes the gate terminal, while the other triac surface is typically connected to a heat sink and to the ground. This complicates the control circuits.
So-called ACS™ bidirectional switches are, for example, described in U.S. Pat. No. 6,034,381, the disclosure of which is hereby incorporated by reference. The triggering of an ACS™ is ensured by the application of a voltage between a control electrode located on the front surface of the component and a main electrode located on the opposite surface of the component, typically grounded.
FIG. 1
shows the equivalent electric diagram of an ACS™-type bidirectional switch. A control electrode G of the bidirectional switch is connected to the emitter of a bipolar transistor T, the collector of which is connected the anode gates of first and second thyristors Th
1
and Th
2
placed in antiparallel between two terminals A
1
and A
2
. Terminal A
1
corresponds to the anode of thyristor Th
1
and to the cathode of thyristor Th
2
. Terminal A
1
is also connected to the base of transistor T. Terminal A
2
corresponds to the anode of thyristor Th
2
and to the cathode of thyristor Th
1
.
FIG. 2
is a simplified cross-section view of an example of a monolithic embodiment of an ACS™. Transistor T is formed in the left-hand portion of the drawing, thyristor Th
1
at the center, and thyristor Th
2
to the right thereof.
The structure of
FIG. 2
is formed from an N-type lightly-doped semiconductor substrate
1
. The anode of thyristor Th
1
corresponds to a P-type layer
2
that is formed on the rear surface side of substrate
1
. Its cathode corresponds to an N-type region
3
formed on the front surface side in a P-type well
4
. The anode of thyristor Th
2
corresponds to a P-type well
5
formed on the front surface side and its cathode corresponds to an N-type region
6
formed on the rear surface side in layer
2
. The periphery of the structure is formed of a heavily-doped P-type isolating wall
7
extending from the front surface to P-type layer
2
. Conventionally, wall
7
is obtained by deep diffusions from the two substrate surfaces. The rear surface is coated with a metallization Ml corresponding to first terminal A
1
of the bidirectional switch. The upper surfaces of regions
3
and
5
are coated with a second metallization M
2
corresponding to second terminal A
2
of the bidirectional switch. An N-type region
8
is formed, on the front surface side, in a P-type well
9
in contact with peripheral region
7
. The surface of region
8
forms one piece with a metallization M
3
connected to control terminal G of the bidirectional switch. A metallization M
4
may be formed on the upper surface of peripheral region
7
. Metallization M
4
is not connected to any external terminal. As an alternative, well
9
may be separated from peripheral region
7
and electrically connected thereto via metallization M
4
.
The operation of this bidirectional switch is the following.
When terminal A
2
is negative with respect to terminal A
1
, thyristor Th
1
can be turned on. If a sufficiently negative voltage with respect to metallization M
1
is applied to terminal G, the base-emitter junction of transistor T is forward biased and this transistor turns on. A vertical current ic shown in dotted lines in
FIG. 2
thus flows from metallization M
1
, through the forward junction between layer
2
and substrate
1
, then into regions
1
,
9
, and
8
corresponding to transistor T. Carriers are thus generated at the level of the junction between substrate
1
and well
9
near the junction between substrate
1
and well
4
, and thyristor Th
1
is turned on. It can also be considered that an auxiliary vertical NPNP thyristor including regions
8
-
9
-
1
-
2
, region
9
of which forms the cathode gate region, has been triggered.
When terminal A
2
is positive with respect to terminal A
1
, the applying of a negative voltage on terminal G turns on transistor T. The carriers present in the vicinity of the junction between substrate
1
and layer
5
turn on thyristor Th
2
.
Various alternative embodiments of an ACS™ switch are described in U.S. patent application Ser. Nos. 09/634,076 and 09/634,077 by the applicant and incorporated hereby by reference. For example, as shown in
FIG. 3
, an N-type region
10
is added to improve the control responsiveness.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an embodiment, in monolithic form, of a power component associated with a state (on or off) detector.
Another object of the present invention is to provide such a state detector associated with an ACS™ switch.
To achieve these and other objects, the present invention provides a detector of the state (on or off) of a vertical power component formed in a lightly-doped semiconductor substrate of a first conductivity type having a front surface and a rear surface, in which the region corresponding to the power component is surrounded with an isolating wall of opposite conductivity type to that of the substrate. This state detector is formed outside of said region and is formed with a vertical detection component, the state of which is switched by parasitic charges propagating outside of the isolating wall when the power component is on.
According to an embodiment of the present invention, the state detector is formed of a vertical transistor, the substrate of which forms the base.
According to an embodiment of the present invention, the vertical transistor includes, on its lower surface side, a diffused region formed at the same time as the diffusion of the lower surface isolating wall.
According to an embodiment of the present invention, the state detector includes several distinct vertical transistors, the emitter regions of which, formed on the lower surface side of the substrate, have distinct diffusion depths.
According to an embodiment of the present invention, the rear surface of the semiconductive layer including the power component and the detection component is coated with a metallization connected to a reference potential.
According to an embodiment of the present invention, a front surface metallization of the detection component is connected to a voltage which is fixed with respect to the reference voltage.
REFERENCES:
patent: 5036377 (1991-07-01), Pathak et al.
patent: 5442219 (1995-08-01), Kato
patent: 5699008 (1997-12-01), Pezzani
patent: 5889374 (1999-03-01), Pezzani
patent: 6017778 (2000-06-01), Pezzani
patent: 6075277 (2000-06-01), Pezzani
patent: 6252257 (2001-06-01), Duclos et al.
patent: A-0 817 277 (1998-01-01), None
patent: A-0 881 672 (1998-12-01), None
patent: A-0 987 751 (2000-03-01), None
patent: A-2 773 021 (1999-06-01), None
French Search Report from French Patent Application 99 14011, filed Nov. 3, 1999.
Pert Evan
Sherry Michael
STMicroelectronics S.A.
Wolf Greenfield & Sacks P.C.
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