Electric power conversion systems – Current conversion – Integrated circuit
Reexamination Certificate
2000-05-03
2001-07-10
Riley, Shawn (Department: 2838)
Electric power conversion systems
Current conversion
Integrated circuit
C363S021090, C363S049000, C363S056110
Reexamination Certificate
active
06259618
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an integrated circuit (IC) of a switching mode power supply (SMPS), and more particularly to a power chip set for an SMPS.
BACKGROUND OF THE INVENTION
It is a principal concern of the cost to manufacture a power supply in selecting between power supply types to be used in particular application and the components selected to construct them. Since integrated circuit technology has advanced such that a majority of the complex switching mode circuits can be integrated on a single chip, switching mode power supplies have become cost competitive with much simpler linear power supplies.
A prior art flyback power supply with a voltage regulator is schematically shown in FIG.
1
. In a power supply circuit
10
, a full-wave bridge rectifier
12
accepts an AC power from a set of power input terminals
14
, and a DC power is therefore supplied to a transformer
18
in association with a filter capacitor
16
. The transformer
18
comprises a primary winding
20
and a pair of secondary windings
22
and
24
. A capacitor
28
is charged through the winding
22
and a diode
26
such that a power supply output voltage is provided at a set of output terminals
30
of the power supply circuit
10
. On the other hand, a capacitor
34
is charged through the winding
24
and a diode
32
to provide a feedback voltage, which is delivered to a pulse width modulator (PWM)
40
through a voltage divider consisting of resistors
52
and
54
. An end of the winding
20
is connected to a high voltage switching transistor
38
in a regulator circuit
36
, which is turned on/off under the control of a signal from the PWM
40
. The control signal from the PWM
40
to a gate of the switching transistor
38
oscillates at a frequency with a duty cycle such that a preset output voltage is maintained between the set of output terminals
30
of the power supply circuit
10
.
A high voltage power start up transistor
42
is used to start up the regulator circuit
36
. When power is turned on, the transistor
42
is turned on and the capacitor
34
is charged to provide a line
50
with internal low voltage power. Once the voltage on the line
50
reaches a threshold voltage, the PWM
40
functions, and when the voltage on the line
50
reaches a specific threshold voltage, a transistor
46
is turned on. As a result, the threshold voltage from a voltage source
48
is connected to a gate of the transistor
42
, and thus the transistor
42
is turned off. As shown in
FIG. 1
, a resistor
44
is connected to a drain of the transistor
42
.
To overcome the inconveniences caused by the high voltage pins of a chip and the high voltage itself, Balakrishnan disclosed in U.S. Pat. No. 5,014,178 a high voltage power start up transistor directly connected to a drain of a high voltage switching transistor, while in U.S. Pat. No. 5,313,381 a feedback control signal and a bias supply voltage combined at a single pin with a metal-oxide-semiconductor (MOS) transistor, such as that proposed in U.S. Pat. No. 4,811,075 to Eklund. However, complicated circuits and expensive manufacturing processes are presented in these prior arts. In addition, it is desired a further integration and excellent performance for an SMPS circuit.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a power chip set for an SMPS.
Briefly, a chip set according to the present invention comprises a high voltage chip and a control unit chip, in which the high voltage chip contains a junction field effect transistor (JFET) connected to the control unit and served as its power start up element. The JFET has a negative threshold voltage and its absolute value is equal to the value of the voltage to start up the control unit.
It is one aspect of the present invention that the JFET further contains a Zener diode for over voltage protection to the power start up terminals of the control unit.
One advantage of the present invention resides in that the JFET is manufactured in a process compatible with the power MOS, and therefore the JFET and the high voltage switching power MOS transistor are integrated on a single chip.
Another advantage of the present invention resides in that the chip set is constituted of the high voltage chip and the control unit chip, such that expensive IC manufacturing process is avoided and a smaller chip area is obtained. The chip set can be packaged into a module.
REFERENCES:
patent: 5285369 (1994-02-01), Balakrishnan
patent: 6125046 (2000-09-01), Jang et al.
Cheng Huang-Chung
Hsu Ching-Hsiang
Liaw Chorng-Wei
Lin Ming-Jang
Lin Wei-Jye
Analog and Power Electronics Corp.
Riley Shawn
Thomas Kayden Horstemeyer & Risley
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