Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2006-05-11
2008-08-12
Mottola, Steven J (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S285000
Reexamination Certificate
active
07411457
ABSTRACT:
The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10Ω or so, for example, the resistor is set to about a few Ω to about 100Ω. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed.
REFERENCES:
patent: 4890069 (1989-12-01), Duffalo et al.
Fujioka Toru
Numanami Masahito
Ono Hideyuki
Mattingly, Stanger Malur & Brundidge PC
Mottola Steven J
Renesas Technology Corp.
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