Amplifiers – With semiconductor amplifying device – Including gain control means
Utility Patent
1999-06-01
2001-01-02
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S285000
Utility Patent
active
06169455
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power amplifying circuit having an automatic power control function for use in radio transmitters and the like.
2. Description of the Related Art
In view of the requirements to reduce power consumption and efficiently utilize frequency resources, it is desirable for transmission power to be set to a sufficient and yet not excessively high level. A portable radio apparatus, for instance, is controlled to raise its transmission power when the level of signals received from it at the base station is not high enough. Or if the level of signals received from a portable radio apparatus is unnecessarily high at the base station, control is effected to reduce the transmission power of that portable unit. Therefore, radio transmitters are provided with an automatic power control (APC) function to match the transmission power of each to an individually set level.
FIG. 15
is a block diagram illustrating a power amplifying circuit with an APC function according to the prior art, described in the Gazette of the Japanese Utility Model Laid-open No. Hei 3-9522. In the diagram, a preamplifier
41
and an amplifier
42
consisting of field effect transistors (FETs) amplify input signals inputted to an input terminal
1
. Whereas output signals from the amplifier
42
are outputted to an output terminal
2
, the level of output power is detected by a detecting circuit
4
. The output power level detected by the detecting circuit
4
and a set output power level inputted to a set input terminal
10
are inputted to an APC circuit
9
. The drain voltage of the preamplifier
41
and the amplifier
42
is determined to make the output power level identical with the set output power level, and this voltage is applied to the drain terminals of the preamplifier
41
and the amplifier
42
.
The set output power level and the drain voltage determined by the APC circuit
9
are inputted to an idle current control circuit
43
, which determines the idle current during the absence of radio signals so as to maximize the power efficiency on the basis of the set output power level and drain voltage at the time, and applies a voltage matching the idle current to the gates of the preamplifier
41
and the amplifier
42
.
In this way, the idle current control circuit
43
controls the gate bias of the preamplifier
41
and the amplifier
42
so as to enhance the power efficiency.
The power amplifying circuit referred to above, however, controls the idle current according to the set output power level of each unit, but does not actually measure or calculate the efficiency and performs control on that basis. Thus, with respect to efficiency, it is an open loop control arrangement to determine the gate bias according to the control output of the APC function. Thus, the gate bias value is determined indiscriminately according to the set output power level of each. However, even if the set output power level is the same, the gate bias value to give the maximum efficiency may vary with the input power level, temperature and frequency among other factors. Therefore the above-cited power amplifying circuit involves the problem that the gate bias value to provide the maximum efficiency may deviate from the optimal value.
Furthermore, the performance characteristics of an amplifiers (including the input/output characteristic, temperature characteristic, frequency characteristic, output power versus drain voltage characteristic, efficiency versus gate current characteristic and static characteristic) generally tend to fluctuate. In order to keep the power efficiency of power amplifying circuits high against fluctuations in characteristics, it is necessary to measure the characteristics of amplifiers in each power amplifying circuit, and adjust the input/output characteristic of the idle current control circuit
43
in each individual power amplifying circuit. These procedures are detrimental to efficient mass production, and at the same time entail additional costs.
In view of these problems, an object of the present invention is to provide a power amplifying circuit having an APC function which can provide a high power efficiency all the time even if such conditions of operation as the output power level, input power level, temperature and frequency vary, and can automatically keep the power efficiency high even if amplifier characteristics are not constant.
Incidentally, other power amplifying circuits having an APC function intended for power efficiency enhancement by controlling the gate bias include one described in the Gazette of the Japanese Patent Laid-open No. Hei 8-51317, but this power amplifying circuit, too, merely sets the gate bias matching the output of the APC circuit, and also determines the gate bias value indiscriminately according to the set output power level. However, even if the output level is the same, the gate bias value to give the maximum efficiency is not necessarily the same if the input power level, temperature and frequency among other factors vary.
SUMMARY OF THE INVENTION
A power amplifying circuit according to the present invention is provided with an APC loop for causing the output power level to comply with the set output power level and an efficiency control loop for detecting the power efficiency (output power/power consumption) and controlling the bias value of an amplifier arranged in the power amplifying circuit so as to maximize the power efficiency.
The efficiency control loop may have a configuration comprising an arithmetic means for calculating the power efficiency of the power amplifying circuit by introducing the input current, the input voltage and the output power level of the power amplifying circuit, and a bias control means for controlling the bias value of the amplifier on the basis of an efficiency value outputted from the arithmetic means.
The arithmetic means, intended to calculate the efficiency value at prescribed intervals of time, and the bias control means may have a configuration wherein the efficiency value currently outputted from the arithmetic means and the efficiency value outputted from the arithmetic means at the preceding control timing are compared, and the bias value of the amplifier is altered if the two efficiency values are not identical.
Alternatively, the bias control means may have a configuration wherein, if the efficiency value currently outputted from the arithmetic means is greater than the preceding efficiency value, the bias value is varied in the same direction in which it was varied at the preceding control timing, or if the efficiency value currently outputted from the arithmetic means is smaller than the preceding efficiency value, the bias value is varied in the direction reverse to that in which it was varied at the preceding control timing.
Here the amplifier is a FET, and the configuration may be such that the APC loop controls the drain bias value of the FET and the efficiency control loop controls the gate bias value of the FET.
Preferably, the response of the APC loop should be quicker than that of the efficiency control loop.
The efficiency control loop may have a configuration wherein control is effected when the output power level of the amplifier is identical with the set output power level.
Further, the power amplifying circuit may have a configuration wherein a presetting means stores control setpoints to give the maximum efficiency at different set output power levels and, when the set output power level changes, outputs a control setpoint matching the changed level to the amplifier.
The power amplifying circuit may have a configuration wherein an input level detecting means for detecting the input power level of the amplifier is provided, and the presetting means has control setpoints to give the maximum efficiency at different input power levels and, when the input power level changes, outputs a control setpoint matching the changed level to the amplifier.
Alternatively, the power amplifying circuit may have a configuration wher
Mottola Steven J.
NEC Corporation
Young & Thompson
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