Amplifiers – With semiconductor amplifying device – Including differential amplifier
Patent
1992-07-06
1993-09-28
Mottola, Steven
Amplifiers
With semiconductor amplifying device
Including differential amplifier
330261, 455114, H03F 345, H04B 104
Patent
active
052489450
DESCRIPTION:
BRIEF SUMMARY
This invention relates to power amplifiers, and is particularly concerned with high efficiency, frequency doubling power amplifiers.
In modern mobile radio system transmitters, the requirement for high levels of integration makes it desirable to include a buffer (power) amplifier, that can drive an antenna directly, within the same silicon integration as other parts of the system. Examples of such systems that might require such a level of integration are the new CT2 system and the proposed DECT and PCN systems.
These amplifiers typically have to deliver power of between 1 mW and a few hundred mW into load impedances varying typically between 50 ohms and 200 ohms, at frequencies of up to 1.7 GHz. This makes the integration of such functions feasible, with the main problem being one of stability. The stability issue is particularly serious if both the input and the output of such functions are accessible externally to the chip via its associated package. This is because radiation across the package will necessarily allow a feedback path between the output and the input of the power amplifier, which may give rise to instability.
It is an object of the present invention to provide a power amplifier suitable for such applications which removes the problems of instability while maintaining the crucial requirement of high efficiency.
It is an object of the invention to achieve this by frequency translating the input signal during the power amplification process.
Traditionally this might have been achieved by applying a separate mixing function prior to the power amplifier as shown in FIG. 1, or by generating heavy distortion in the power amplifier and selecting, by filtering, a harmonic of the output as shown in FIG. 2. This does not however remove the problem that a large amount of power gain exists at a given frequency, on chip in the power amplifier, and in the latter case is very power inefficient.
In accordance with the present invention there is provided a power amplifier comprising two class C amplifiers having their outputs coupled together and having their inputs arranged to be driven differentially, whereby an input signal is frequency translated during the power amplification.
Preferably, the fundamental frequency of the input signal is suppressed at the output, and the fundamental frequency of the output signal is the second harmonic of the input signal.
In order that the invention may be more fully understood, one presently preferred embodiment of amplifier circuit will now be described by way of example and with reference to the accompanying drawings, in which:
FIGS. 1 and 2 show two known methods of frequency translation;
FIG. 3 shows the essential part of the power amplifier in accordance with the invention;
FIG. 4 shows a more complete circuit diagram of the power amplifier of FIG. 3; and
FIG. 5 shows the signals present at different points of the circuit of FIG. 4 in operation.
Referring first to FIG. 3, this shows two class C amplifiers comprising transistors q1 and q2 with their outputs coupled together and with their inputs driven differentially. The operation of this system can be explained mathematically as follows:
Assuming the large signal transconductance of a bipolar transistor is a good approximation to an exponential law: -1)=I{-(.delta.v/vt)+(.delta.v/vt).sup.2.1/2!+(.delta.v/vt).sup.3.1/3!+(.d elta.v/vt).sup.4.1/4!+ . . . } /vt).sup.3.1/3!+(v.sub.1 /vt).sup.4.1/4!+(v.sub.1 /vt).sup.5.1/5!+ . . . } /vt).sup.3.1/3!+(v.sub.2 /vt).sup.4.1/4!+(v.sub.2 /vt).sup.5.1/5!+ . . . } input stimuli v.sub.1 and v.sub.2, where I.sub.1 and I.sub.2 are the D.C bias currents in q1 and q2 respectively.
If I.sub.1 and I.sub.2 are equal (identical biasing conditions) and v.sub.1 =-v.sub.2 =v (differential signal), then: =2.I.{1+(v/vt).sup.2.1/2!+(v/vt).sup.4.1/4!+(v/vt).sup.2.1/2!+(v/vt).sup.4 .1/4!+(v/vt).sup.6.1/6!+(v/vt).sup.8.1/8!+ . . . } sin.sup.4 wt/(24.vt.sup.4)+a.sup.6. sin.sup.6 wt/(720.vt.sup.6)+ . . . }
It can now be clearly seen that the fundamental frequency of the input signal is suppress
REFERENCES:
patent: 4019118 (1977-04-01), Harwood
patent: 4965528 (1990-10-01), Okanobu
patent: 5033110 (1991-07-01), Harman
Linden Gerald E.
Mottola Steven
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