Power amplifier with improved linearity and reduced...

Amplifiers – With semiconductor amplifying device – Including plural amplifier channels

Reexamination Certificate

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Details

C330S12400D, C330S12400D, C330S129000, C330S131000, C330S134000, C330S296000

Reexamination Certificate

active

06710662

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to a power amplifier with improved linearity. More specifically, a high-output power amplifier that can control power to reduce power consumption with improved linearity that is applied to the transmitter unit of a radio communication system is disclosed.
BACKGROUND OF THE INVENTION
Power amplifiers are widely used in electronic devices, particularly wireless communications systems. Generally, the power amplifier in a transmitter of a wireless communication system should be capable of adjusting the output power to minimize power consumption.
FIG. 1
is a circuit diagram that illustrates an example of an existing high-output power amplifier (HPF). As illustrated in the figure, transistors
10
,
11
are connected in series, where the drain of transistor
10
is connected via an RF choke L to a power source VDD, with Bias
1
applied to its gate and an output terminal Out connected to the common point of the RF choke L and the drain of the transistor
10
. The gate of the transistor
11
is connected via a capacitor C to an RF input terminal RFIN, with its source grounded and Bias
2
applied to the common point of the transistor
11
and the capacitor C via a resistor R.
An existing high-output power amplifier of the above configuration is usually manufactured with chemical compound semiconductors such as gallium arsenide (GaAs). However, since the manufacturing process is not well developed, methods of power control are not either. Also, since transistor gain is adjusted by controlling the bias voltage directly from outside, the transistor is basically a voltage controlled current source, and thus the gain change is too sensitive with regard to the controlled voltage. Additionally, the gain may not be constant based on samples due to changes in threshold voltage Vt caused by process changes.
FIG. 2
is a circuit diagram that illustrates another example of an existing high-output power amplifier. As illustrated in the figure, transistors
21
-
24
are connected in parallel, where an input terminal Input is connected to each gate of transistors
21
-
24
. The sources of transistors
21
-
24
are grounded. Switch transistors
25
-
28
are used to interrupt the power source VDD supplied to the drain of each transistor
21
-
24
according to external control signals. Here, the symbol L represents a RF choke, C represents a capacitor, and W represents the circuit line width that is the reference size of each transistor.
An existing high-output power amplifier of the above configuration has been manufactured using a CMOS process technique to make up for defects in the power amplifier circuits of chemical compound semiconductors shown in FIG.
1
. Although the power control is relatively constant and stable, another transistor stack is required to form the switch transistor
25
-
28
for power control for manufacturing using the CMOS technique. A stack increase as in this example lowers the saturation margin of the circuit when the voltage supply is low, and sacrifices gain and linearity.
It would be useful if an improved power amplifier could be developed that avoids the problems described above.


REFERENCES:
patent: 3449685 (1969-06-01), Holmes
patent: 4117418 (1978-09-01), Hoglund
patent: 5694085 (1997-12-01), Walker
patent: 359072209 (1984-04-01), None
Staert et al, “A 2v CMOS Cellular Tranceiver Print End” IEEE Solid-State Circuit, Conference 2000 pp 142-143, 450.*
Holt “Electronic Circuits” John Wiley & Sons 1978 pp 635-637.

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