Amplifiers – With semiconductor amplifying device – Including protection means
Reexamination Certificate
2001-05-31
2002-10-01
Nguyen, Patricia (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including protection means
C330S20700P, C330S110000, C330S282000
Reexamination Certificate
active
06459340
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to power amplifiers, and more particularly to a circuit for protecting a transistor used as a power amplifier from overvoltage conditions at its output terminal.
BACKGROUND
The use of diodes between the collector terminal of a transistor and ground to provide over-voltage protection from electrostatic discharge (ESD) and some load is mismatch conditions is standard engineering practice. Preventing a buildup of excess collector voltage is important, because such excess collector voltage is one of the main causes of radio frequency (RF) power transistor burnout where mismatched loading or ESD is present. An RF signal handled by the power transistor is typically defined as an alternating current having a frequency above substantially 9 kHz.
A presently-known circuit
100
for protecting a transistor is shown in FIG.
1
. The base terminal of a bipolar transistor
102
is connected to an input terminal
104
, the collector terminal of the bipolar transistor
102
is connected to an output terminal
106
, and the emitter terminal of the bipolar transistor
102
is connected to ground. The input terminal
104
and the output terminal
106
can be physical terminals, or simply arbitrary points on conductors leading to other electrical components. A filter
114
may be provided between the input terminal of the bipolar transistor
102
and the input terminal
104
. Further, an inductor
116
may be connected at one end to a point in the circuit between the input terminal
104
and the filter
114
(or the bipolar transistor
102
, if the filter
114
is not used), where the other end of the inductor
116
is connected to ground.
A diode array
108
is also connected to the collector terminal of the bipolar transistor
102
. An inductor
118
may be connected from a voltage source to the collector terminal of the bipolar transistor
102
and the diode array
108
. The inductor
118
acts to resist current flow from the voltage source to the diode array
108
or collector terminal of the bipolar transistor
102
, while pulling up the voltage of the output terminal
106
during normal operation.
The diode array
108
includes a number of first diodes
110
connected in series, where the initial first diode
110
in series is connected to the collector terminal of the bipolar transistor
102
and the last first diode
110
in series is connected to ground. The first diodes
110
are each oriented toward ground. That is, the forward bias direction of each first diode
110
is away from the collector terminal of the bipolar transistor
102
and toward the ground. The activation voltage and voltage drop of each first diode
110
, and the number of first diodes
110
, are chosen such that a particular overvoltage at the collector terminal of the bipolar transistor
102
will cause a forward bias to be applied to all of the first diodes
110
, thereby opening a path to ground through which the overvoltage can dissipate. In this way, the first diodes
110
protect the collector terminal of the bipolar transistor
102
from overvoltage conditions that can result from electrostatic discharge (ESD) or from impedance or voltage mismatch associated with a load connected to the output terminal
106
.
Similarly, the diode array
108
includes a number of second diodes
112
connected in series, where the initial second diode
112
in series is connected to ground and the last second diode
112
in series is connected to the collector terminal of the bipolar transistor
102
. The second diodes
112
are each oriented toward the collector terminal of the bipolar transistor
102
. That is, the forward bias direction of each second diode
112
is toward the collector terminal of the bipolar transistor
102
and away from the ground. The set of serially-connected second diodes
112
is connected in parallel to the set of serially-connected first diodes
110
. The activation voltage and voltage drop of each second diode
112
, and the number of second diodes
112
, are chosen such that a particular overvoltage at the collector terminal of the bipolar transistor
102
will cause a forward bias to be applied to all of the second diodes
112
, thereby opening a path to ground through which the overvoltage can dissipate. Such overvoltage is a different polarity from the overvoltage that causes all of the first diodes
110
to open a path to ground. In this way, the second diodes
112
protect the collector terminal of the bipolar transistor
102
from overvoltage conditions that can result from electrostatic discharge (ESD) or from impedance or voltage mismatch associated with a load connected to the output terminal
106
. The number of first diodes
110
and second diodes
112
is not necessarily equal, as overvoltage at a particular polarity may warrant more protection than overvoltage at the opposite polarity.
Thus, the diode array
108
allows at least some overvoltage to run to ground in order to protect the transistor
102
. However, the continuing application of gain by the transistor
102
to a signal received at its base terminal from the input terminal
104
still may result in excess voltage at the collector terminal, and damage the transistor
102
.
SUMMARY
A set of clamping diodes between terminals of a transistor acting as a power amplifier is configured to allow overvoltage at the output terminal of the transistor to travel through those clamping diodes to provide feedback used by the transistor for gain control.
In one aspect of the invention, two sets of clamping diodes are provided between the collector terminal and the base terminal of a bipolar transistor. A first set of clamping diodes are serially connected, and the forward bias of each clamping diode in the first set is oriented toward the base terminal. A second set of clamping diodes are serially connected, and the forward bias of each clamping diode in the second set is oriented toward the collector terminal. The first set of clamping diodes is connected in parallel to the second set. In this way, overvoltage at the collector resulting from ESD or load mismatch creates a forward bias on the set of clamping diodes oriented toward the base, allowing current to flow across those clamping diodes to provide feedback. The feedback reduces the input current applied to the base terminal of the transistor, reducing the overvoltage conditions at the collector terminal and protecting the transistor from damage.
In another aspect of the invention, two sets of clamping diodes are provided between the drain terminal and the gate terminal of a field effect transistor. A first set of clamping diodes are serially connected, and the forward bias of each clamping diode in the first set is oriented toward the gate terminal. A second set of clamping diodes are serially connected, and the forward bias of each clamping diode in the second set is oriented toward the drain terminal. The first set of clamping diodes is connected in parallel to the second set. In this way, overvoltage at the drain resulting from ESD or load mismatch creates a forward bias on the set of clamping diodes oriented toward the gate, allowing current to flow across those clamping diodes to provide feedback. The feedback reduces the input current applied to the gate terminal of the transistor, reducing the overvoltage conditions at the drain terminal and protecting the transistor from damage.
The invention will be more fully understood upon consideration of the detailed description below, taken together with the accompanying drawings.
REFERENCES:
patent: 4092709 (1978-05-01), Voigt et al.
patent: 4464634 (1984-08-01), Velazquez
patent: 4523152 (1985-06-01), Garde
patent: 5070538 (1991-12-01), Milberger et al.
patent: 5512857 (1996-04-01), Koskowich
Apel Thomas R.
Bonkowski James E.
Litzenberg Paul H.
Allenby Christopher B.
Nguyen Patricia
Skjerven Morrill LLP
TriQuint Semiconductor Inc.
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