Amplifiers – With semiconductor amplifying device – Including distributed parameter-type coupling
Reexamination Certificate
2000-06-06
2001-08-14
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including distributed parameter-type coupling
C330S295000
Reexamination Certificate
active
06275111
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to the field of high frequency power amplifiers. More specifically, the resent invention relates to the field of millimeter-wave power amplifiers utilizing field-effect transistor (FET) arrays.
BACKGROUND OF THE INVENTION
In the design of satellite, portable, and other communication equipment, there is a continuing requirement to achieve greater transmission power in a smaller package and at a higher frequency. This requirement poses problems at high-microwave and millimeter-wave frequencies, and becomes crucial in transmitters operating in the Q band (i.e., at 40 GHz or greater).
To fulfil this requirement, millimeter-wave solid-state monolithic gallium arsenide (GaAs) power amplifiers utilizing higher electron mobility transistors have been developed.
FIG. 1
shows a simplified plan sketch of a prior-art module
20
containing such a millimeter-wave power-amplifier.
In prior-art power-amplifier module
20
, high power density was provided through the utilization of a large-periphery output stage
22
. Output stage
22
achieves the desired power density without sacrificing high-frequency gain by using a linear (i.e., one-dimensional) array
24
of smaller linear arrays
26
of FETs
28
. Even though this approach offers significant improvements over previous attempts, there still remained several distinct problems.
Each smaller linear array
26
has an input bus and an output bus. For each FET
28
in each smaller linear array
26
, a gate couples to the input bus, a drain couples to the output bus, and a source couples to a common ground.
For each smaller linear array
26
, the input bus has a single infeed point and the output bus has a single outfeed point. Impedance and layout difficulties restrict each smaller linear array
26
to being centrally coupled for both inputs and outputs. That is, the infeed point is centrally located on the input bus and the outfeed point is centrally located on the output bus. As a result, a signal propagating from the infeed point to the outfeed point for a given smaller linear array
26
must use signal paths of differing lengths through differing elements (i.e., through individual FETs
28
) of the given smaller linear array
26
. It may be appreciated that the distance from the infeed point to the outfeed point through centrally located FETs
28
is markedly shorter than that through peripherally located FETs
28
. The signal therefore sustains differing amounts of phase shift for differing signal paths reducing the upper frequency limits of prior-art power-amplifier module
20
.
The power output of output stage
22
is a function of the number of FETs
28
in linear array
24
. The prior art utilizes linear array
24
of smaller linear arrays
26
of FETs
28
. For a given number of FETs
28
per smaller linear array
26
, the power output of output stage
22
is a function of the number of smaller linear arrays
26
. To achieve a desired power output, it is often necessary to have several smaller linear arrays
26
. Four such smaller linear arrays
26
, each having twelve FETs
28
, are depicted in FIG.
1
.
Prior-art power-amplifier module
20
can be said to have a propagation axis
30
extending essentially in the general direction of signal flow. Linear array
24
of output stage
22
has an array axis
32
extending substantially perpendicularly to propagation axis
30
. Each smaller linear array
26
has a FET axis
34
substantially coincident with array axis
32
. The result is that linear array
24
extends across the general direction of signal flow, resulting in a wide monolithic GaAs chip
36
. The length of GaAs chip
36
is a function of the signal processing components taken substantially serially over propagation axis
30
. Overall, the width of linear array
24
results in GaAs chip
36
having a significant area. GaAs being expensive, this equates to a significant per-chip cost.
An input interface
38
is used to couple the input circuitry of module
20
to output stage
22
(i.e., the input busses of smaller linear arrays
26
). Since each smaller linear array
26
has an individual infeed point, input interface
38
must interface the input circuitry to as many infeed points as there are smaller linear arrays
26
. As a result, input interface
38
occupies a relatively large portion of the area of GaAs chip
36
.
Similarly, an output interface
40
is used to couple output stage
22
(i.e., the output busses of smaller linear arrays
26
) to an output of module
20
. Since each smaller linear array
26
has an individual outfeed point, output interface
40
must interface as many outfeed points as there are smaller arrays to the output. As a result, output interface
40
, too, occupies a relatively large portion of the area of GaAs chip
36
.
What is needed, therefore, is a power amplifier possessing a sufficient number of FETs to achieve the desired power output. This amplifier, while having a large-periphery output stage, should have a minimal array-axis length so as to minimize GaAs chip area. Similarly, the output stage should be so configured as to reduce the number of infeed and outfeed points, thus reducing the size and complexity of the input and output interface and further reducing the requisite overall chip area. The lengths of the multiple paths of a signal propagating through the output stage should be as near to equal as possible, thus reducing phase difference and significantly extending upper frequency response.
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patent: 4769618 (1988-09-01), Parish et al.
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patent: 4929913 (1990-05-01), Sato
patent: 5166640 (1992-11-01), Fathimula et al.
patent: 5485118 (1996-01-01), Chick
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patent: 6121843 (2000-09-01), Vampola et al.
“A 1.4 Watt Q-Band GaAs PHEMT MMIC” by Stephen J. Nash et al., GaAs IC Symposium, Technical Digest 1997, Anaheim, CA, Oct. 12-15, 1997, 97CH36098, p. 283-286.
Goshinska, Jr. John D.
Mendoza Armando J.
Seely Warren L.
Bogacz Frank J.
Gorrie Gregory J.
Motorola Inc.
Nguyen Khanh Van
Pascal Robert
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