Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2003-03-14
2004-10-12
Choe, Henry (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S285000
Reexamination Certificate
active
06803822
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a power amplifier; and, more particularly, to a power amplifier including a bias current control circuit capable of effectively reducing a quiescent current of the amplifier to improve the power added efficiency (PAE) thereof.
BACKGROUND OF THE INVENTION
As is well known, a power amplifier is one of major power consuming components of a cell phone.
FIGS. 1A and 1B
illustrate a typical prior art power amplifier module for use in a conventional CDMA cell phone.
The power amplifier shown in
FIG. 1A
includes a bias circuit
101
in addition to an amplifying circuit. The amplifying circuit includes an amplifying transistor Q
1
having an emitter grounded; an inductor L, one end thereof being supplied with Vcc and the other end thereof being connected to a collector of Q
1
; an output capacitor Co disposed between the collector of Q
1
and an RF_OUT terminal; and an input capacitor Ci coupled between an RF_IN terminal and a base of Q
1
.
The bias circuit
101
is of a current mirror structure including a bias transistor Q
2
, a collector thereof being supplied with Vref; a bias transistor Q
3
, an emitter thereof being grounded; a resistor R
1
, one end thereof being supplied with Vref and the other end thereof being connected to a base of Q
2
and a collector of Q
3
; a resistor R
2
, one end thereof being connected to the base of Q
3
and the other end thereof being coupled to an emitter of Q
2
; and a resistor R
3
, one end thereof being coupled to a node between Ci and the base of Q
1
and the other end thereof being coupled to the emitter of Q
2
.
The power amplifier shown in
FIG. 1B
includes a bias circuit
102
in addition to an amplifying circuit identical to that shown in FIG.
1
A. The bias circuit
102
is also of a current mirror structure including a bias transistor Qbias, a collector thereof being supplied with Vref; an emitter-base diode (i.e., a bipolar transistor with short-circuited collector and base) D
1
, an anode thereof being connected to a base of Qbias; an additional emitter-base diode D
2
, an anode thereof being connected to a cathode of D
1
and a cathode thereof being grounded; and a resistor Rbias, one end thereof being supplied with Vref and the other end thereof being connected to the anode of D
1
.
Referring to
FIGS. 1A and 1B
, once Vref is set to have a certain value, I
B
(a bias current of Q
1
, i.e., a DC component of a base current of Q
1
) is fixed regardless of an output power. That is to say, the bias circuit
101
or
102
supplies a constant bias current regardless of the output power, which in turn gives rise to a constant quiescent current I
c
(i.e., a DC component of a collector current of Q
1
), I
C
being an operation current of Q
1
.
A maximum output power is one of most important performance figures for such power amplifiers. However, such power amplifiers are rarely in operation at the maximum output power of, e.g., 28 dBm, but mostly operate at low output power levels less than, e.g., 16 dBm. Therefore, it is required to control operation currents to be reduced at the low output power levels so that we can improve the PAE (power added efficiency) of CDMA power amplifiers.
Various research efforts have been made for a PAE improvement by controlling a bias with an aid of an additional circuitry. For example, an ABC (an automatic bias control) system was proposed to decrease the bias current by way of adjusting Vref at the low output power levels (see, e.g., T. Sato et al., “Intelligent RF power module using automatic bias control (ABC) system for PCS CDMA applications”, IEEE MTT-S Int. Microwave Simp. Dig., 1998, pp.201-204). Since, however, the ABC system requires a separate ABC-chip in addition to an MMIC (monolithic microwave integrated circuit) incorporating therein a power amplifier circuitry, the size of the power amplifier module increases.
For other examples, a dynamic supply voltage (V
CC
) and current adjustment based on envelope detection were proposed, where additional components such as a dc-dc converter, an envelope detector and a coupler are required (see, e.g., M. Ranjan et al., “Microwave power amplifiers with digitally-controlled power supply voltage for high efficiency and high linearity”, IEEE MTT-S Int. Microwave Simp. Dig., 2000, pp.493-496; and Yang Kyounghoon et al., “High efficiency class-A power amplifiers with a dual-bias-control scheme”, IEEE Trans. Microwave Theory Tech., vol.47, pp.1426-1432, August 1999). In these schemes, however, it is difficult to integrate the additional components (i.e., a dc-dc converter, an envelope detector and a coupler) in an MMIC together with power amplifiers because of the size or complexity of those components.
As described above, prior art schemes for controlling the bias of a CDMA power amplifier have drawbacks due to additional elements that substantially increase a chip area, and power consumption.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a power amplifier module including a bias current control circuit that scarcely increases a chip area and power consumption.
In accordance with the present invention, there is provided a power amplifier for use in a mobile handset including: an amplifying transistor for generating an output of the mobile handset; a bias circuit having a bias transistor, the bias circuit providing a bias current to bias the amplifying transistor; and a bias current control circuit, responsive to a control signal, for adjusting the bias current to control an operation current of the amplifying transistor, wherein the control signal is determined by a power level of the output of the mobile handset.
REFERENCES:
patent: 6369656 (2002-04-01), Dening et al.
patent: 6515546 (2003-02-01), Liwinski
patent: 6690237 (2004-02-01), Miyazawa
Tetsuo Sato, Shigehiro Yuyama, Akishige Nakajima, Hideyuki Ono, Akiyoshi Iwai, Eiichi Hase and Chusiro Kusano, “Intelligent RF Power Module Using Automatic Bias Control (ABC) System for PCS CDMA Applications”, 1998 IEEE of MTT-S Digest, pp. 201-204.
Kyounghoon Yang, George I. Haddad and Jack R. East, “High-Efficiency Class-A Power Amplifiers with a Dual-Bias-Control Scheme”, IEEE Transactions on Microwave Theory and Techniques, vol. 47, No. 8, Aug. 1999, pp. 1426-1432.
M. Ranjan, K. H. Koo, G. Hanington, C. Fallesen and P. Asbeck, “Microwave Power Amplifiers with Digitally-Controlled Power Supply Voltage for High Efficiency and High Linearity”, 2000 IEEE MTT-S Digest, pp. 493-496.
Kim Ji Hoon
Kim Joon Hyung
Noh Youn Sub
Park Chul Soon
Anderson Kill & Olick PC
Choe Henry
Information and Communications University Educational Foundation
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