Amplifiers – With semiconductor amplifying device – Including plural stages cascaded
Reexamination Certificate
2005-11-10
2009-06-23
Choe, Henry K (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural stages cascaded
C330S310000
Reexamination Certificate
active
07551036
ABSTRACT:
An H.F. power amplifier is disclosed having a plurality of branches (10, 11, 12) switched in parallel. Each branch comprises a plurality of amplifier elements (T1, T4) switched in series. Resistors (R2, R5) enable the voltage (U_DS) applied to the amplifier elements (T1, T4) to be set at a fraction of a supply voltage (Ud) applied to the branches (10, 11, 12). Capacitors (C2, C4) are used to adjust the source impedance of the amplifier elements (T2, T4). In order to prevent the gate-drain voltage (U_GD) from exceeding the breakdown voltage of an amplifier element (T1, T4) and damaging the amplifier element (T1, T4), a limiting path (7) is connected according to the invention between the gate terminal (G) and the drain terminal (D) of the amplifier element (T1, T4), the limiting path (7) being switchable between a conducting state and a blocking state depending on the gate-drain voltage (U_GD).
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Wu L et al., “The integrated 2W high voltage/high Power 0.12mu/m RF CMOS Power Amplifier”, 34th European Microwave Conference, The Netherlands, 2004.
Berroth Manfred
Wu Lei
Boys Donald R.
Central Coast Patent Agency Inc.
Choe Henry K
Universitat Stuttgart
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