Power amplifier driver and method of using

Amplifiers – With control of power supply or bias voltage – With control of input electrode or gain control electrode bias

Reexamination Certificate

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Details

C330S141000

Reexamination Certificate

active

06744313

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates in general to power amplifier drivers and, more particularly, to power amplifier drivers for use in wireless circuitry exhibiting high bandwidth at low power consumption.
In most modern radio transmitters, the transmitted signal amplitude needs to be accurately controlled to cope with existing standards. Due to manufacturing and environment variations, it is very difficult to control the amplifier's output power without any feedback, therefore, feedback is generally used to provide transmitted power control. The feedback may be realized by measuring the output power or any other parameter reflecting the output power level. The measured value is compared to a reference level and an error correction is subsequently applied to the gain control of the power amplifier to adjust the transmitted signal amplitude. The negative feedback loop allows an accurate power control as long as the measurement device and the comparison device are accurate too. Furthermore, a high gain should exist to ensure that the measurement result is actually very close to the reference, but low enough such that the control loop maintains stability.
In actual implementation, a power detector, connected to the power amplifier output through a directional coupler often realizes the power measurement. A differential amplifier realizes the signal comparison and provides the requested high gain. The implementation is not sufficient, however, to insure stability. The power amplifier, the detector and the differential amplifier are introducing cutoff frequencies and phase shifts, which could cause the system to become unstable. Since it is very difficult to remove cutoff frequencies introduced by the power amplifier, detector and signal comparator, an efficient solution is to create a dominant pole which gives the loop a first order behavior. The first order behavior is implemented using a low pass filter or by using an integrator to simultaneously create a very high open-loop gain and a dominant low frequency pole. The filter or integrator is commonly realized using operational amplifiers.
In Time Division Multiple Access (TDMA) systems, the Radio Frequency (RF) designer is tasked with another A problem. In order to limit spurious, out-of-band frequency transmission, output power transitions from low power to high power and high power to low power should be controlled, or smoothed, to limit spurious transmissions. In the transmission timeslot, the output power is at a normal operating level, however, out of the transmission timeslot, the power level should be decreased to a very low output level. Operation of the power amplifier control loop just prior to the transmission timeslot is open loop, since the control input is tied to ground potential and no output signal is transmitted. At the beginning of the transmission timeslot, the loop must be closed in a relatively short amount of time which may cause initial instability within the control loop resulting in unwanted oscillation. A simple solution is to add a fixed voltage before the transmission time slot to allow the system to quickly close the loop at the beginning of the ramp. The fixed voltage can be implemented with an operational amplifier or an acquisition device, which senses the power amplifier emission threshold. Some prior art solutions add another pole to the control loop when the acquisition circuitry is added, subsequently requiring the operational amplifier to have a higher cutoff frequency to maintain an acceptable phase margin. Other prior art solutions do not add a pole to the loop, but the automated operation of the prior art solutions are relatively complicated and limit flexibility to the RF designer.
Hence, there is a need for a power amplifier driver and associated control loop which provides adequate stability and dynamic range with adequate performance both in and out of the transmission timeslot.


REFERENCES:
patent: 5150075 (1992-09-01), Hietala et al.
patent: 5376895 (1994-12-01), Aihara
patent: 5448770 (1995-09-01), Hietala et al.
patent: 5617060 (1997-04-01), Wilson et al.

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