Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2003-03-18
2004-09-07
Shingleton, Michael B. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S253000, C330S277000
Reexamination Certificate
active
06788141
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of power amplifiers. More particularly, this invention relates to improved power amplifier circuitry which reduces the peak voltages to which switching devices of the amplifier are subjected.
BACKGROUND OF THE INVENTION
In some applications utilizing a power amplifier, it is desirable to limit the peak voltage that the switching devices of the power amplifier are subjected to. For example, in CMOS devices, the transistor breakdown voltage may be only slightly greater than the supply voltage. Therefore, CMOS devices are not well suited to traditional power amplifier designs, where switching devices are subjected to voltages at least twice the supply voltage.
FIG. 1
is a schematic diagram of a conventional Class E amplifier. As shown, a transistor M
1
is connected between ground and an inductor L
1
which is connected to a voltage source V
dd
. The gate of the transistor M
1
is connected to an input signal Vi. The connection of the transistor M
1
and the inductor L
1
forms a node labeled Vd. The switching device M
1
, as well as other switching devices described may be comprised of any suitable switching devices, for example, MOSFETs or other transistor types. A capacitor C
1
is connected between Vd and ground. The amplifier includes a transformation network consisting of inductor L
2
and capacitor C
2
. The capacitor C
2
is connected to a load R
L
at output node V
o
.
FIG. 2
is a timing diagram illustrating the input signal Vi and the resulting voltage at Vd. As shown, the input signal Vi is a square wave signal switching between ground and V
dd
. When the input signal Vi is high (V
dd
), the transistor M
1
is turned on, holding Vd to ground. When the input signal Vi transitions to low, transistor M
1
turns off and the voltage at Vd rises above V
dd
. During this time, the transistor M
1
must sustain this high drain-to-source voltage. After peaking, the voltage at Vd decreases until it reaches ground. In a typical prior art Class E design, this peak voltage is approximately 3.6 V
dd
. Although the peak voltage can be reduced slightly, it can not be decreased below about 2.5 V
dd
since the average voltage at Vd must equal V
dd
. Designs such as that shown in
FIG. 1
are not well suited to certain device technologies, such as CMOS, where transistor breakdown voltages are only slightly higher than the supply voltage.
It can therefore be seen that there is a need for amplifier designs where the peak voltages applied to the transistors of the amplifier are reduced so that they are below the transistor breakdown voltages of the devices being used to implement the design.
Another problem relating to amplifiers relates to the use of differential circuits. It is difficult to perform differential-to-single-ended conversion when a single ended load is required with high efficiency. Therefore, there is a need for improved differential-to-single-ended conversion designs.
SUMMARY OF THE INVENTION
A power amplifier of the invention includes a first switching device connected between a first supply voltage and a first output node, a second switching device connected between a second supply voltage and a second output node, and an inductance coupled between the first and second output nodes.
Another embodiment of the invention provides a method of reducing the peak output voltage in an amplifier including the steps of providing an inductor having first and second terminals, providing a first switching device connected between the first terminal of the inductor and a first supply voltage, providing a second switching device connected between the second terminal of the inductor and a second supply voltage, applying a voltage between the first and second terminals of the inductor during a first portion of a clock cycle by turning on the first and second switching devices, and turning off the first and second switching devices during a second portion of the clock cycle.
Another embodiment of the invention provides a differential power amplifier including a first amplifier having a first switching device connected between a first supply voltage and a first output node, a second switching device connected between a second supply voltage and a second output node, and an inductance coupled between the first and second output nodes, a second amplifier having a third switching device connected between a third supply voltage and a third output node, a fourth switching device connected between a fourth supply voltage and a fourth output node, and an inductance coupled between the third and fourth output nodes, and wherein the first and second amplifiers are coupled together to drive a load.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
REFERENCES:
patent: 4021751 (1977-05-01), Suzuki
patent: 4590436 (1986-05-01), Butler et al.
patent: 4649467 (1987-03-01), Vesce et al.
patent: 4772856 (1988-09-01), Nojima et al.
patent: 4808907 (1989-02-01), Main
patent: 4857865 (1989-08-01), Berman et al.
patent: 4893030 (1990-01-01), Shearer et al.
patent: 5023566 (1991-06-01), El-Hamamsy et al.
patent: 5118997 (1992-06-01), El-Hamamsy et al.
patent: 5274341 (1993-12-01), Sekine et al.
patent: 5291123 (1994-03-01), Brown
patent: 5327337 (1994-07-01), Cripe
patent: 5343162 (1994-08-01), Davis
patent: 5420537 (1995-05-01), Weedon et al.
patent: 5450036 (1995-09-01), Nishioka et al.
patent: 5477188 (1995-12-01), Chawla et al.
patent: 5604383 (1997-02-01), Matsuzaki
patent: 5612647 (1997-03-01), Malec
patent: 5623231 (1997-04-01), Mohwinkel et al.
patent: 5625205 (1997-04-01), Kusama
patent: 5648743 (1997-07-01), Nagaya et al.
patent: 5726603 (1998-03-01), Chawla et al.
patent: 5742205 (1998-04-01), Cowen et al.
patent: 5831331 (1998-11-01), Lee
patent: 5867061 (1999-02-01), Rabjohn et al.
patent: 5880635 (1999-03-01), Satoh
patent: 5942946 (1999-08-01), Su et al.
patent: 5955926 (1999-09-01), Uda et al.
patent: 5969582 (1999-10-01), Boesch et al.
patent: 5973368 (1999-10-01), Pearce et al.
patent: 5974041 (1999-10-01), Kornfeld et al.
patent: 6011438 (2000-01-01), Kakuta et al.
patent: 6016075 (2000-01-01), Hamo
patent: 6133793 (2000-10-01), Lau et al.
patent: 6137273 (2000-10-01), Bales et al.
patent: 6147511 (2000-11-01), Patel et al.
patent: 6157258 (2000-12-01), Adishian et al.
patent: 6167134 (2000-12-01), Scott et al.
patent: 6181207 (2001-01-01), Chevallier et al.
patent: 6198347 (2001-03-01), Sander et al.
patent: 6208549 (2001-03-01), Rao et al.
patent: 6208875 (2001-03-01), Damgaard et al.
patent: 6222788 (2001-04-01), Forbes et al.
patent: 6232634 (2001-05-01), Wu et al.
patent: 6274937 (2001-08-01), Ahn et al.
patent: 6319829 (2001-11-01), Pasco et al.
patent: 6323735 (2001-11-01), Welland et al.
patent: 6384540 (2002-05-01), Porter, Jr. et al.
patent: 4419318 (1995-07-01), None
patent: 399561 (1990-11-01), None
patent: WO 98/37627 (1998-08-01), None
patent: WO 00/16492 (2000-03-01), None
Sokal, N. O. and Sokal, A. D., “Class E—A new class of high-efficiency tuned single ended switching power amplifiers,” IEEE Journal of Solid State Circuits, vol. SC-10, No. 3, Jun. 1975, pp. 168-176.
Makihara, Chihiro et al., “The Possibility of High Frequency Functional Ceramics Substrate”, International Symposium on Mulilayer Electronic Ceramic Devices, May 5, 1998 in Cincinnati, Ohio.
Dupuis Timothy J.
Paul Susanne A.
Johnson & Associates
Shingleton Michael B.
Silicon Laboratories Inc.
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