Power amplifier circuit for integrated digital circuits

Details Power amplifier circuit for integrated digital circuits Power amplifier circuit for integrated digital circuits

1989-09-19

1990-10-23

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307448, 307450, 307263, 307544, 307546, H03K 301, H03K 19094

Patent

active

049654640

ABSTRACT:
Power amplifier circuit for integrated digital circuits that combines the low permanent current consumption of a NOF push-pull output stage with the well-defined high level of a NON-NOFF amplifier stage having external clamp diode. An optimization of the leading edge is additionally achieved by fast drive and transient overdrive. A preceding inverter reduces the input capacitance of the overall circuit.

REFERENCES:
"A 3-ns GaAs 4 kx 1-bit Static RAM", by N. Yokoyama et al, IEEE Trans. Electron Devices, vol. Ed-32 (1985), 9, pp. 1797-1801.
"Fully Decoded GaAs 1 kb Static RAM Using Closely Space Electrode FETs", by F. Katano et al, IEEE IEDM (1983), pp. 86-89.
"Introduction to VLSI Systems Reading", by C. Mead, Addison Wesley, (1980), pp. 17-18.
"A GaAs 1-kbit Static RAM with a Shallow Recessed-Gate Structure FET", by S. Takano, IEEE Trans. Electron Devices, vol. Ed-32, (1985), pp. 1135-1139.
"High Gain Sense Amplifier", by S. N. Chakravarti et al, IBM, Dec. 1977, pp. 2607-2608.

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