Power amplifier arrangement

Amplifiers – With semiconductor amplifying device – Including class d amplifier

Reexamination Certificate

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Details

C330S20700P, C330S310000

Reexamination Certificate

active

06204730

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a power amplifier arrangement with high current drive capability, particularly but not exclusively for transmission systems.
In several transmission systems, such as Asymmetric Digital Subscriber Line, video distribution and audio, there is a need to transmit signals with high crest factors (peak/rms). This high crest factor results from short signal peaks that rarely occur, but which force the driver to be supplied from a high voltage supply. This results in a high dynamic power consumption in the amplifier.
In the seventies amplifiers were developed with lower power consumption, more particularly the class G amplifiers working at two different supply voltages. They use one large output stage, biased by two different voltage supplies, whereby diodes are generally used to control the switchover from the low voltage to the high voltage supply. Such G class transistor amplifiers are amongst others disclosed in U.S. Pat. No. 3,772,606 and U.S. Pat. No. 4,100,501 .
In case the transistors of the classical G class amplifiers have to drive large currents, they may be replaced by Darlington pairs, such as for instance disclosed in the above-mentioned U.S. Pat No. 4,100,501. In this prior art document, the described push-pull variant comprises two Darlington pairs having together four transistors of the same conductivity type and two Darlington pairs having together four transistors of the conductivity type opposite to that of the first mentioned Darlington pairs. The transistors of the first and second Darlington pairs conduct during each positive half cycle of the input signal. The transistors of the third and fourth Darlington pairs conduct during each negative half cycle of the signal. The collectors of the two transistors of a first Darlington pair are connected to each other and to a positive D.C. high voltage supply. Similarly, the collectors of the two transistors of a fourth Darlington pair are connected to each other and to a negative D.C. high voltage supply. In this prior art embodiment the collectors of the two transistors of the second Darlington pair are also connected to each other and via a diode to a positive D.C. low voltage supply, while the two transistors of the third Darlington pair are connected to each other and via another diode to a negative D.C. low voltage supply. The emitter of the output transistor of the first, respectively fourth, Darlington pair is coupled to the collectors of both transistors of the second, respectively third, Darlington pair.
This prior art solution whereby each transistor of the original class-G amplifier is replaced by a Darlington pair, results in a high current amplification and consequently a high current drive capability, but at the same time in a large voltage drop across all Darlington pairs.
The invention seeks to provide an amplifier with high current drive capability with relatively low dynamic power consumption, but avoiding such a large voltage drop across the transistors.
SUMMARY OF THE INVENTION
In accordance with the invention, this object is accomplished in an amplifier of the G class type, comprising at least one set of two transistor pairs having together four transistors of the same conductivity type with an input electrode, a common electrode and an output electrode, each pair comprising an input transistor and an output transistor in cascade, the output electrode of the input transistor being coupled to the input electrode of the output transistor, whereby means are provided for applying an input signal to the input electrodes of the input transistors of both pairs and both pairs are biased by two different voltage supplies, control means being provided for switching over from the voltage of one voltage supply to the voltage of the other voltage supply, the transistors of the first pair of a set being coupled in a Darlington circuit arrangement, characterized in that both transistors of the second pair of said set have their common electrodes separated from each other, the common electrode of the input transistor of said second pair being coupled to the output electrode of the input transistor of the first pair and the common electrode of the output transistor of said second pair being coupled to the output electrode of the output transistor of the first pair.
By disconnecting from each other the common terminals of the transistors of the second pair and by putting in series the input transistors of both pairs, the voltage drop is reduced and the dynamic range of the amplifier at the lower supply voltage is increased. This can in turn result in a lower value of this lower supply voltage, which again results in a lower power consumption, being the main benefit of the invention.
Remark that in the claims and throughout this document, the expression “common electrode” is to be interpreted with reference to the configuration of the circuit of which the transistor having this common electrode forms part. In this respect, as is described in all standard electronics handbooks, the common electrode is common to both the input and the output circuit, as opposed to either the input or the output electrodes themselves. This common electrode, corresponds to the “common” or ground from ac point of view.
The input electrode of the transistors may be the base, the common electrode the collector and the output electrode the emitter, as described by claim
2
.
In such case, the collectors of both transistors of the first pair of a set are coupled to a first D.C. voltage supply, the emitter of the output transistor of the first pair and the collector of the output transistor of the second pair of the set are coupled to each other and to a second D.C. voltage supply with a voltage which is in absolute valuelower than the voltage provided by the first voltage supply, the means for applying an input signal being coupled to the bases of the input transistors of both pairs, and the collector of the input transistor of the second pair being coupled to the emitter of the input transistor of the first pair and thus disconnected from the collector of the output transistor of the second pair and thus also disconnected from the emitter of the output transistor of the first pair.
In addition, a drive control circuit coupled between the means for applying an input signal, and the input terminals of the transistor pairs, may comprise diodes coupled between the input transistors of the two pairs and the means for applying this input signal, as is described in claims
3
and
4
.
The control means for switching over from one voltage to the other can include a diode in a connection between the second lower D.C. voltage supply, on the one hand, and the output electrode of the output transistor of the first pair and the common electrode of the output transistor of the second pair, on the other hand.
The control means for switching over from one voltage to the other may also include a diode in a connection between the second lower D.C. voltage supply, on the one hand, and the output electrode of the input transistor of the first pair and the input electrode of the output transistor of the first pair, on the other hand.
The means for applying an input signal may include an A.C. input signal source, this signal being a current or a voltage, in which case the amplifier contains two sets of two transistor pairs, one set for the positive half cycle of the input signal and one set for the negative half cycle of the input signal, whereby the transistors of the second set are of the opposite conductivity type to that of the transistors of the first set and the two voltage supplies for the second set are of a polarity opposite to the polarity of the voltage supplies for the first set.
In this case, the amplifier may more particularly comprise a second set with third and fourth pairs similar to the second and first pairs of the first set, whereby thus the emitter of the input transistor of the fourth pair, which is a Darlington pair, is coupled to the base of the output transistor of this fourth pair and

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