Electrical transmission or interconnection systems – Switching systems – Condition responsive
Reexamination Certificate
1999-09-10
2001-11-20
Ballato, Josie (Department: 2836)
Electrical transmission or interconnection systems
Switching systems
Condition responsive
C307S130000, C307S131000, C361S093100, C361S100000, C361S115000
Reexamination Certificate
active
06320283
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a power switching apparatus capable of switching power, isolating faults, and limiting in-rush and fault currents.
BACKGROUND OF THE INVENTION
Spacecraft, such as those used for earth orbit and interplanetary space missions, must be designed within the limits of a number of constraints. Two important constraints are the weight and size of components used in the spacecraft. In addition to such constraints, spacecraft must be designed to perform specified functions within specified parameters. Among these are power load switching and power protection functions of various electrical and electronic subsystems of the spacecraft. Finally, reliability is always an overriding concern in the design of spacecraft.
Traditionally, load switching and protection functions were implemented with relays and fuses. These devices tend to be relatively large and heavy. They are capable of performing only the most basic of power load switching and protection functions. Relays provide only on-off switching and fuses provide only one-time protection, which is not resettable. The reliability of these devices is adequate, but improved reliability is always desirable.
A need arises for a power switching and protection device that provides reduced size and weight, improved functionality, and improved reliability over traditional devices.
SUMMARY OF THE INVENTION
The present invention is an advanced power actuation and switching module (PASM) that is suitable for use in spacecraft. PASM provides tremendous miniaturization and weight reduction of power switching and protection functions over traditional devices. PASM provides greatly increased functionality, and is capable of switching power, isolating faults, and limiting in-rush and fault currents. PASM is implemented using integrated circuit and high density interconnect technologies, providing improved reliability.
The present invention is a power switching apparatus comprising a plurality of power switching circuits. Each power switching circuit comprises a switched power input and a switched power output, a switching device coupling the switched power input to the switched power output, the switching device having a control input, and an integrated circuit coupled to the switching device control input, having an enable input receiving a signal indicating whether the switching device is to be on or off, an input sensing current flow through the switching device, and an input sensing voltage at the switched power output, the circuit operable to control the switching device based on the control input, current sensing input and voltage sensing input.
In one embodiment, the integrated circuit comprises a power on circuit, responsive to the enable input receiving a signal indicating that the switching device is to be on, operable to transmit an enable signal, a sense amplifier circuit, coupled to the current sense input, operable to output a signal indicating current flow through the switching device, an overload circuit, coupled to the current flow indicating signal, operable to output an overload signal indicating that the current flow through the switching device has exceeded a predetermined limit, a current limit circuit, coupled to the current flow indicating signal, operable to output a gate drive current limit signal, a control circuit, responsive to the enable signal and the overload signal operable to transmit a charge pump bias signal and a gate drive control signal, a charge pump circuit, responsive to the charge pump bias signal, operable to output a gate drive bias signal and a gate drive circuit, responsive to the gate drive bias signal, the gate drive control signal, and the gate drive current limit signal, operable to output a switching device control signal coupled to the switching device control input.
In one aspect of the present invention the overload circuit may include a timer circuit operable to delay output of the overload signal.
In another aspect of the present invention, the gate drive circuit may include a circuit operable to limit an inrush current through the switching device during turn on.
In another aspect of the present invention, the power on circuit is further responsive to the enable input receiving a signal that the switching device is to be off and is further operable to transmit a disable signal. The power on circuit may further include a circuit operable to delay output of the disable signal after receiving the signal that the switching device is to be off.
In another aspect, the integrated circuit may further include a voltage telemetry circuit coupled to the input sensing voltage at the switched power output and outputting a signal indicating the sensed voltage on an output of the integrated circuit.
In another aspect, the sense amplifier circuit may further output a signal indicating the sensed current flow on an output of the integrated circuit.
In another aspect, the switching device may be a power field-effect transistor.
In another aspect, the overload circuit timer circuit may include a circuit operable to set a delay time of the output of the overload signal. The circuit operable to set a delay time of the output of the overload signal may be a capacitor external to the integrated circuit.
In another aspect, the gate drive circuit inrush current limit circuit may include a circuit operable to set the inrush current through the switching device. The circuit operable to set the inrush current through the switching device may be a capacitor external to the integrated circuit.
In another aspect, the power on circuit disable output delay circuit may include a circuit operable to set a delay time of the output of the disable signal. The circuit operable to set a delay time of the output of the disable signal may be a capacitor external to the integrated circuit.
REFERENCES:
patent: 5063516 (1991-11-01), Jamoua et al.
patent: 5324989 (1994-06-01), Thornton
“Switch Intelligently With SSPC's” Circle 217, Sales Contact, Circle 277 Literature, PCIM, Oct. 1995, 1 pps.
“RP-2100 Series, 28 VDC Solid-State Power Controllers”, ILC Data Device Corporation, 1995, 1 pps.
Mulvey et al. “Development of a State-of-the-Art Power Actuation and Switching Modulation” IEEE International Workshop, Chicago, IL, Sep. 17-19, 1998, 5 pps.
Salim et al. “PASM, The Advanced Power Actuation and Switching Module As The Building Block For Space Micropower Systems” Mar. 8-11, 1999, 5 pps.
“Remote Power Controllers (Solid State)” Martin Marietta, 2 pps.
Jud James W.
Mulvey James F.
Salim Abbas A.
Ballato Josie
DeBeradinis Robert L.
Lockheed Martin Corporation
Swidler Berlin Shereff & Friedman, LLP
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