Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2004-10-08
2008-10-07
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S189050, C365S230090, C365S233100
Reexamination Certificate
active
07433258
ABSTRACT:
A method and architecture that overcomes the problem of latency-caused performance degradation of electronic memory systems. The method involves a “Posted Precharge,” by which an external command for Precharge is given as early as possible, such as immediately following a Read command. The execution of the Precharge is delayed by a precharge counter until all Read/Write commands are completed. By posting a precharge command on a bus at the first available opportunity, multiple pages can be open on the same bank of a memory device. As a result, access latencies are significantly reduced and efficiency of bus in electronic memory systems is significantly improved.
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Mohan Rao G. R.
Schuette Franz Michael
DataSecure LLC.
Hartman Domenic N.S.
Hartman Gary M.
Hartman & Hartman P.C.
Le Thong Q
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