Excavating
Patent
1993-05-21
1995-10-10
Envall, Jr., Roy N.
Excavating
G06F 1110, H03M 1312
Patent
active
054577047
ABSTRACT:
A method for a post-processors provides reliability information about every decoded data symbol at the output of an arbitrary decoder. This reliability information is generated by comparing the decoded sequence to a small list of alternative sequences which differ from the decoded sequence at least in the symbol for which the reliability is being evaluated. It is shown that this algorithm is a simplification of the optimal symbol-by-symbol detector (OSSD).
REFERENCES:
patent: 5228061 (1993-07-01), Newby et al.
patent: 5230003 (1993-07-01), Dent et al.
patent: 5295142 (1994-03-01), Hatakeyama
L. R. Bahl et al., "Optical Decoding of Linear Codes for Minimizing Symbol Error Rate", IEEE Transactions on Information Theory, 284-287 (Mar. 1974).
S. Verdu, "Minimum Probability of Error for Asynchronous Gaussian Multiple-Access Channels", vol. IT-32,85-96, No. 1, 85-96 (Jan. 1986).
J. Hagenauer et al., "A Viterbi Algorithm with Soft-Decision Outputs and its Applications", Proc. GLOBECOM '89, Dallas, Tex., 1680-1686 (Nov. 1989).
R. Sfez et al., "A Weighted-Output Variant of the Viterbi Algorithm for Concatenated Schemes Using A Convolutional Inner Code", Proc. EUROCODE '90, Udine, Italy, (13 pages), (Nov. 1990).
T. Aulin, "A Fractional Viterbi-Type Trellis Decoding Algorthm", Abstracts of the IEEE Int. Symp. Inf. Theory, Ann Arbor, Mich. (Oct. 1989), (abstract only).
G. Battail, "Weighting the Symbols Decoded by the Viterbi Algorithm", Abstracts of the IEEE Int. Symp. Inf. Theory, Ann Arbor, Mich. (Oct. 1989), (abstract only).
J. Huber et al., "Reliability Estimation for Symbols Detected by Trellis-Decoders", AEU, vol. 44, 8-21 (English abstract only) (Jan. 1990).
N. Seshadri et al., "Generalized Viterbi Algorithms for Error Detection with Convolutional Codes", Proc. GLOBECOMM '89, Dallas, Tex., 1534-1538 (Nov. 1989).
T. Hashimoto, "A List-Type Reduced-Constraint Generalization of the Viterbi Algorithm", IEEE Transactions of Information Theory, vol.-IT, No. 6, 866-876 (Nov. 1987).
G. D. Forney, Jr., "The Viterbi Algorithm", Proceedings of the IEEE, vol. 61, No. 3, 268-278 (Mar. 1973).
O. Jorgensen et al., "High Speed VLSI Architectures for Soft Output Viterbi Decoding", 1991 Proceedings International Conference on Application Specific Array Processors, Berkeley, Calif. (Aug. 1992).
Hoeher Peter
Seshadri Nambirajan
AT&T IPM Corp.
Envall Jr. Roy N.
Moise Emmanuel L.
Olson Katharyn E.
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