Post passivation structure for a semiconductor device and...

Details Post passivation structure for a semiconductor device and... Post passivation structure for a semiconductor device and...

2006-05-08

2008-12-23

Andújar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

Groove

C257S734000, C257S736000

Reexamination Certificate

active

07468545

ABSTRACT:
A post passivation rerouting support structure comprises a relatively thin support layer above the passivation layer to support the RDL, and a relatively thick support layer for fine pitch interconnects extending from the RDL and terminating as contact structures at the surface of the thick support layer, for a next level packaging structure. The thick support layer is planarized before defining the contact structures. The thick support layer may be formed after the conducting posts have been formed, or the thick support layer is formed before forming the conducting posts in vias formed in the thick support layer. An encapsulating layer may be provided above the thick support layer, which top surface is planarized before defining the contact structures. The encapsulating layer and the further support layer may be the same layer.

REFERENCES:
patent: 6303486 (2001-10-01), Park
patent: 6828668 (2004-12-01), Smith et al.
patent: 6924551 (2005-08-01), Rumer et al.
patent: 6969910 (2005-11-01), Chinda
patent: 7029953 (2006-04-01), Sasaki
patent: 7196014 (2007-03-01), Dalton et al.
patent: 2005/0151130 (2005-07-01), Stasiak
patent: 2005/0176233 (2005-08-01), Joshi et al.

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