Post-gate LOCOS

Details Post-gate LOCOS Post-gate LOCOS

1996-05-14

1997-03-18

Dang, Trung

Fishing, trapping, and vermin destroying

437 70, 437 40, 437 41, 437 72, H01L 2176

Patent

active

056122497

ABSTRACT:
A method of defining a local oxidation of silicon (LOCOS) field isolation process after a poly gate is deposited. A gate oxide is grown on a silicon substrate, and then poly or amorphous silicon is deposited. A thin layer of PECVD or LPCVD oxide is deposited on the poly, and LPCVD nitride is then deposited as a hard mask. A device active area is defined by photoresist mask and plasma etch. The layers may either be etched down to the silicon surface, or the silicon surface may be further etched to create a recessed silicon region.
An oxide layer is grown on the exposed sidewalls of the poly, and another layer of nitride is deposited. The nitride is etched to form a nitride spacer, and a field oxide is grown. A field isolation implant is formed, followed by stripping the nitride space. The oxide layer is removed, reexposing the poly. Another layer of poly and WSi film is deposited, and gate and interconnects are defined by applying a gate mask and etch. An alternate approach of self-aligned silicide gate, junction and interconnect can be formed without using WSi by depositing Ti after the gate is defined. N-LDD and P-LDD implants are performed by masks, followed by an oxide spacer being formed. N+ and p+ junctions are then formed by separate masks and implants.

REFERENCES:
patent: 4758530 (1988-07-01), Schubert
patent: 4818235 (1989-04-01), Chao
patent: 5039625 (1991-08-01), Reisman et al.
patent: 5149669 (1992-09-01), Hosaka
patent: 5310692 (1994-05-01), Chan et al.

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