Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1999-05-26
2000-01-04
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438398, 438255, H01L 2120
Patent
active
060109424
ABSTRACT:
A process for forming a DRAM capacitor structure, comprised with a HSG silicon/polysilicon crown shaped storage node structure, has been developed. The process features the use of a series of wet clean procedures, used to prepare the surface of the HSG silicon/polysilicon, crown shaped storage node structure, for the formation of an overlying capacitor dielectric layer. A first wet clean procedure is employed after the formation of the crown shaped storage node structure via a CMP procedure, featuring an ammonium hydroxide--hydrogen peroxide solution, used to remove CMP, as well as HSG silicon particles from the surface of a photoresist plug used for definition of the crown shaped storage node structure. Another wet clean procedure, first performed in a DHF solution, then followed by a sulfuric acid--hydrogen peroxide treatment, is used to prepare the HSG silicon/polysilicon, crown shaped storage node structure, for formation of the overlying capacitor dielectric layer.
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Chien Rong-Wu
Ching Tung Chia
Koh Chao-Ming
Tuan Hsiao-Chiu
Ackerman Stephen B.
Nguyen Tuan H.
Saile George O.
Vanguard International Semiconductor Corporation
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