Optics: measuring and testing – By alignment in lateral direction – With registration indicia
Reexamination Certificate
2000-09-20
2003-10-28
Adams, Russell (Department: 2877)
Optics: measuring and testing
By alignment in lateral direction
With registration indicia
C355S053000, C355S077000
Reexamination Certificate
active
06639677
ABSTRACT:
FIELD OF THE INVENTION AND RELATED ART
This invention relates to a position measuring method and a position measuring system. More particularly, the invention concerns a position measuring method and a position measuring system suitably usable, for example, in an alignment system of a semiconductor manufacturing exposure apparatus or in a registration inspection system in the field of semiconductor manufacture, for example, for inspecting the performance of an exposure apparatus. Specifically, the invention concerns a position measuring method and a position measuring system using the same, wherein marks of different shapes are formed beforehand on a wafer which is the subject of measurement and wherein an optimum mark, among them, which enables highest accuracy measurement is selected.
In order to meet further increases in density of an integrated circuit, projection exposure apparatuses for semiconductor manufacture are required to have a higher resolving power for projection exposure of a circuit pattern of a reticle onto a wafer. Various methods have been proposed and investigated in relation to improving the projection resolving power. An example is that the numerical aperture (NA) of a projection optical system is enlarged while holding the wavelength of exposure light fixed. Another example is an exposure method in which a shorter wavelength is used, such as by changing i-line to g-line, then to the emission wavelength of an excimer laser, then to the emission wavelength of a F
2
laser and then to synchrotron radiation (SR) light.
On the other hand, in order to meet further miniaturization of a circuit pattern, a reticle having an electronic circuit pattern formed thereon and a wafer must be placed in alignment with each other very accurately. The required alignment accuracy is generally one-third or less of the circuit pattern. If the rule of a circuit pattern of 1 gigabit DRAM is 0.18 micron, the overlay precision should be 60 nm or lower. Here, the overlay precision refers to the alignment accuracy over the whole exposure region.
Further, a registration inspection machine for measuring the overlay precision must have a measurement precision which is one-tenth of the overlay precision. Thus, for a 1 gigabit DRAM, a measurement precision of 6 nm is necessary.
It is known that measurement errors can be categorized into three.
1) Tool Induced Shift (TIS)
2) Wafer Induced Shift (WIS)
3) TIS-WIS Interaction
The error TIS is defined as an error caused by any factor inside a detection system. The error WIS is defined as an error caused by any factor related to the subject of measurement. The error TIS-WIS interaction is defined as an error caused by the interaction between TIS and WIS. In the specification of the subject application, description will be made mainly on a wafer in the semiconductor manufacture, and therefore factors related to the wafer will be considered. However, in the present invention, the subject of measurement is not limited to the wafer. Nevertheless, errors attributable to the subject of measurement will be referred to as WIS, in this specification.
Factors for TIS inside an optical system may be comma aberration of a detection optical system and non-uniformness of an illumination system, for example. Factors for WIS may be the shape of a wafer mark and asymmetry of a resist, for example.
A most fundamental solution for high precision position measurement is to remove TIS and WIS. However, as regards TIS, for example, to this end, it is necessary to reduce comma aberration of an optical system to a level not greater than &lgr;/100. Practically, this is very difficult to accomplish. If is accomplished, the yield rate is very low and the cost becomes very expensive. Further, in an exact sense, the adjustment of TIS must be made on a main assembly of the apparatus and, therefore, the structure becomes very bulky. This increases the cost of the apparatus.
On the other hand, it has been found that WIS differs with the structure of a mark. Referring now to
FIGS. 3A-3E
, a metal CMP wafer process will be considered, as an example. After a flattening process such as CMP, apparently, surface steps (surface level differences) of a wafer are all flattened and it seems that there is no surface step remaining. Practically, however, what have been removed by the flattening are those surface steps defined at a certain target linewidth, that is, for example, at the linewidth of a plug linewidth. There still remain surface steps at a portion of a larger linewidth, i.e., a thick linewidth portion. Generally, the subject to be flattened by CMP is, in many cases, a narrowest linewidth portion. In a case of a 0.18 micron process, a value of 0.18 micron is the target value.
FIG. 4
shows an alignment mark which comprises plural marks of oblong shape, having a length 30 microns, and being arrayed at a pitch of 20 microns. Each oblong mark is formed by a continuous line of a narrow width W.
FIG. 5
illustrates the relationship of the symmetry and the height of a surface step with respect to the linewidth W of the alignment mark of
FIG. 4
, while taking the linewidth W as a variable. It is seen that, with increases of the linewidth W, the height of the surface step becomes larger but the signal symmetry thereof is degraded. Here, the signal symmetry can be defined such as shown in FIG.
6
.
When the height of a surface step increases, it means that the signal contrast in a detection system becomes higher. Once a detection method in the detection system is fixed, a threshold level corresponding to the smallest value of signal contrast that can be detected by the detection system is determined. Also, a threshold surface step which can be detected in accordance with the determined threshold level as well as a linewidth W
d
which defines that threshold surface step, are determined.
On the other hand, if the signal symmetry is not good, it causes a measurement error. A major factor for the signal asymmetry is WIS. The symmetry has a correlation with the detection precision. Once a required alignment accuracy is fixed, a threshold level for tolerable symmetry, for example, is determined. Thus, from the threshold surface step, a linewidth W
s
which defines the threshold value for the symmetry is determined.
From the characteristics of increase/decrease in estimated quantities shown in
FIG. 5
, it is seen that, once the mark linewidth is set between the linewidth W
d
that can be determined by the signal contrast and the linewidth W
s
being tolerable in respect to the precision, optimization of a mark is accomplished.
FIG. 7
shows a current optimization process for an alignment mark. Currently, when a mark is to be produced first on a wafer in a certain process, the wafer process is executed while plural marks of different linewidths are formed thereon. Here, the process execution means, in the case of a semiconductor exposure apparatus, performing an exposure step and a development step after an alignment step, as well as a measuring step by use of a registration inspection machine. In the case of a registration inspection machine, it refers to advancing the process further to measure the state of registration on the basis of electric characteristics.
After execution of the process, among the marks of different linewidths prepared beforehand, a mark linewidth which is within an optimization linewidth range described hereinbefore is chosen. Currently, however, an optimum mark linewidth can be confirmed only through practical execution of the process. This needs time and operators' works and, therefore, increases the product cost.
SUMMARY OF THE INVENTION
In an alignment method and alignment system according to the present invention, an optimum mark for position measurement can be selected without the necessity of practical execution of a process. For example, as regards marks on a wafer, for example, if there is WIS, the properties of them on the wafer surface are not always even and they involve dispersion. The mark selection, when an alignment operation or a registra
Ina Hideki
Morohoshi Hiroshi
Adams Russell
Canon Kabushiki Kaisha
Esplin D. Ben
Fitzpatrick ,Cella, Harper & Scinto
LandOfFree
Position measuring method and position measuring system... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Position measuring method and position measuring system..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Position measuring method and position measuring system... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3165326