Electricity: motive power systems – Positional servo systems – With particular 'error-detecting' means
Patent
1985-01-09
1986-11-11
Dobeck, B.
Electricity: motive power systems
Positional servo systems
With particular 'error-detecting' means
318480, 250234, 250578, G05B 106
Patent
active
046225021
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
This invention relates to a position detecting apparatus for an industrial robot, and more particularly to a position detecting apparatus which carries out position detection by subtracting the respective detected signals of a plurality of photoelectric converters disposed two-dimensionally. This invention aims at providing a position detecting apparatus which enables one and two dimensional position detection to be carried out not only for the center of an object to be detected but also for an angle and an edge of the same, and also position detection in a wide range to be carried out in response to the size of the object to be detected.
BACKGROUND ART
When the industrial robot is used for work and the object is difficult to detect with accuracy, the position detecting apparatus is used for obtaining the position information of the object.
Generally, the position detecting apparatus employs an industrial camera, which requires a processing system of high computing function and often creates a problem in the manufacturing cost when in use. One method for position detection by a simplified processing system has been proposed, in which images of an object to be detected are image-formed on four photoelectric converters of 2.times.2 pcs. disposed two-dimensionally, and moved by a scanning unit slantwise of the disposal direction of the photoelectric converters so that two sets of detecting signals of the sum of outputs from two adjacent photoelectric converters are computed, whereby the one-dimensional scanning unit once scans the object to be detected so as to enable the two-dimensional position detection thereof.
Referring to FIGS. 1, 2 and 3, an object 2 to be detected lit by a light source 1 is image-formed on photoelectric converters 4a, 4b, 4c and 4d divided into four by an imaging lens 3. A galvanometer 5 as a scanning unit is disposed between the imaging lens 3 and the photoelectric converters 4a, 4b, 4c and 4d, so that the scanning signal output from a control unit 6 drives the galvanometer 5 to allow the images to move slantwise of the disposal directions of photoelectric converters 4a, 4b and 4a, 4c respectively. At first, the scanning signal is output from a driver circuit 7, the galvanometer 5 is driven, and the image of the object 2 image-formed on the photoelectric converters 4a, 4b, 4c and 4d moves slantwise in the disposal directions of photoelectric converters 4a, 4b and 4a, 4c. Detected signals P.sub.1, P.sub.2, P.sub.3 and P.sub.4 of photoelectric converters 4a, 4b, 4c and 4d are given in a computing circuit 8a and a signal .vertline.(P.sub.1 +P.sub.3)-(P.sub.2 +P.sub.4).vertline. is output therefrom. When the image of object 2 to be detected is given on the photoelectric converters 4a and 4c, the image is compared with S.sub.a preset a certain value to be S.sub.a >>0 and that .vertline.(P.sub.1 +P.sub.3)-(P.sub.2 +P.sub.4).vertline.>S.sub.a is obtained and a gate circuit 9a outputs a signal. Next, the image of object 2 to be detected, when given to an intermediate portion between the photoelectric converters 4a to 4c and those 4b to 4d, is compared with Ta preset a certain value to be to Ta.apprxeq.0, and a signal .vertline.(P.sub.1 +P.sub.3)-(P.sub.2 +P.sub.4).vertline.<Ta is obtained, so that a comparator circuit 10a outputs a signal. Signal outputs from the gate circuits 9a and comparator circuit 10a are given to an AND circuit 11a so that a sampling circuit 12a is given a sampling signal from the AND circuit 11a and reads the scanning signal of driver circuit 7 at that time to output a position signal in the direction of disposing the photoelectric converters 4a and 4b. Thereafter, when the image of the object 2 to be detected is given on the photoelectric converters 4b and 4d, signal .vertline.(P.sub.1 +P.sub.3)-(P.sub.2 +P.sub.4).vertline.>Sa is obtained, thereby outputting no signal from the gate circuit 9a. Also, an input to a computing circuit 8b is output therefrom as .vertline.(P.sub.1 +P.sub.2)-(P.sub.3 +P.sub.4), the output being processed a
REFERENCES:
patent: 3457422 (1969-07-01), Rottmann
patent: 3864564 (1975-02-01), Adkins
patent: 3943359 (1976-03-01), Matsumoto et al.
patent: 4123695 (1978-10-01), Hale et al.
patent: 4352984 (1982-10-01), Ohara
Inoue Toshitugu
Maruo Tomohiro
Okutani Norio
Dobeck B.
Matsushita Electric - Industrial Co., Ltd.
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