Portable integrated switching power amplifier

Amplifiers – Variable impedance for signal channel controlled by separate... – Electron tube or diode as impedance

Reexamination Certificate

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C330S284000

Reexamination Certificate

active

06356150

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates generally to radio frequency (RF) power amplifiers and, more particularly, to a multiple power level amplifier circuit for maintaining high efficiency.
(2) Description of the Prior Art
The need for radio receivers continues to be widespread as recently evidenced by the phenomenal growth associated with use of cellular telephones. Cellular telephones have continued and will continue to undergo dramatic market growth. One recent trend in the cellular telephone industry is toward use of multiple power level amplifiers to accommodate code division multiple access (CDMA) systems in portable handheld units. Known techniques for achieving high efficiencies at multiple output power levels associated with such power amplifiers have generally required multiple switches and/or control logic, or have otherwise required multiple output amplifier stages combined to vary the saturated amplifier output power. These techniques are disadvantageous in that they require large die sizes, therefore increasing associated die costs. The aforesaid increased die costs are competitively prohibitive for manufacturing the aforesaid portable handheld units in high volumes.
One multiple power level amplifier for accommodating multiple power amplifier output power levels is disclosed in U.S. Pat. No. 5,661,434, issued Aug. 26, 1997 to Brozovich et al., and entitled High Efficiency Multiple Power Level Amplifier Circuit. Brozovich et al. disclose a high efficiency multiple power level amplifier circuit for reducing power consumption during low power operations. A plurality of power amplifier stages are cascaded to provide multiple levels of amplification. At least one power amplifier stage includes a signal switching network to allow one or any combination of power amplifiers to be switched out when lower power operations are desired. The switched out power amplifiers are biased such that substantially no current is drawn form the power source. A disadvantage of the foregoing approach to dealing with multiple power levels is associated with the inherent necessity to increase the die size required to accommodate the multiple switches as well as the additional signal switching network.
In view of the above, a portable integrated switching power amplifier that is suitable for use with CDMA systems and that uses a single switching device to accommodate multiple power levels with no substantial efficiency loss is desirable. Such an architecture offers simplicity of design and will generally occupy less area on an integrated circuit than a similar power amplifier architecture that uses switching devices and associated control logic presently familiar to those skilled in the art of CDMA systems for power amplifiers in portable units.
SUMMARY OF THE INVENTION
The present invention is directed to a power amplifier architecture suitable for use with CDMA systems in portable units such as cellular telephones and the like. Such power amplifiers must be capable of selectively varying output power between 3 dB below saturation and 50 dB below the specified output power level. It is well known that power amplifier efficiency degrades rapidly as the output power level is lowered away from saturation by the ratio of Pout/Pout
max
.
One preferred embodiment of the present invention utilizes a pair of PIN diodes implemented with GaAs heterojunction bipolar transistor (HBT) technology in a fully integrated GaAs HBT amplifier. The PIN diodes are used to implement a compact bypass switching network such that a power amplifier output stage can be selectively switched into and out of the GaAs HBT amplifier circuit. The PIN diodes have a high breakdown voltage level in the off mode (high amplifier output power mode), thereby reducing any distortion components normally associated with more conventional switching devices or circuit elements. The PIN diodes have a low series on resistance in the on mode (low amplifier output power mode), thereby reducing any insertion loss normally associated with the more conventional switching devices or circuit elements.
The present invention then, is directed to a PIN diode compact bypass switching network for selectively switching one or more stages of a power amplifier into or out of the amplifier circuit. One preferred embodiment allows an output amplifier transistor collector current to be reused when the PIN diode switching network functions in the low power on mode (bypass mode). The PIN diode switching network has a high series resistance in the high power mode compared to either the output impedance of the amplifier input stage(s) or the input impedance of the output amplifier transistor(s). This feature ensures highly efficient power transfer from the input stage(s) to the output stage(s) in the high power mode. A preferred embodiment utilizes an inverter circuit in the low power mode to both switch off the output stage(s) and switch on the PIN diodes. A low output impedance is presented to the input stage(s) in the low power mode, allowing higher saturated output power then that achievable when matching the output of the input stage(s) to the input of the output stage(s). Known circuit architectures require each amplifier stage to be matched to 50 ohms with a switch between each device and a third bypass switch. Such known architectures suffer undesirable losses from the matching networks and switches.
Accordingly, one feature of the present invention includes provision of a portable integrated switching power amplifier architecture capable of performing both low power and high power amplification with no substantial degradation in power amplifier efficiency.
Another feature of the present invention includes provision of a portable integrated switching power amplifier architecture that is integrated on a single integrated circuit chip, and that is useable in a cellular telephone suitable for use with CDMA systems.
These and other features of the present invention will become apparent to those skilled in the art after a reading of the following description of the preferred embodiment when considered with the drawings.


REFERENCES:
patent: 3942181 (1976-03-01), Berrod et al.
patent: 4158819 (1979-06-01), Smither
patent: 4673886 (1987-06-01), Bickley et al.
patent: 4743863 (1988-05-01), Cassany et al.
patent: 4910478 (1990-03-01), Koyama
patent: 5604460 (1997-02-01), Sehrig et al.
patent: 5661434 (1997-08-01), Brozovich et al.
patent: 5758269 (1998-05-01), Wu
patent: 5831477 (1998-11-01), Tsumura
patent: 5834975 (1998-11-01), Bartlett et al.

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