Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing
Patent
1998-07-22
2000-09-19
Vu, Viet D.
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
709104, 709226, 370412, 370429, G06F 1300
Patent
active
061226734
ABSTRACT:
A scheduler for controlling when entities are operated upon by the server. The scheduler includes N entities, where N is an integer greater than or equal to 2. Each entity has a rate at which it is to receive service from the server. The scheduler includes a memory having finishing times f.sub.i of the N entities, where f.sub.i corresponds to the time the i'th entity is to be operated upon by the server. The scheduler includes a virtual clock that keeps track of virtual time so the finishing times f.sub.i can be identified. The scheduler includes a controller which chooses entities to be operated upon by the server as a function of the finishing times. The controller slows virtual time to provide service to the entities. The controller is connected to the virtual clock and the memory. A scheduler for controlling when entities are operated upon the server. The scheduler includes N entities, where N is an integer greater than or equal to 2. Each entity has a rate at which it is to receive service from the server. At least a first entity of the N entities has a plurality of connections, and the controller chooses the first entity to provide service when at least one of the plurality of connections is waiting for service and has a finishing time which is the earliest finishing time of the entities waiting for service.
REFERENCES:
patent: 5828878 (1998-10-01), Bennett
patent: 5850399 (1998-12-01), Ganmukhi et al.
patent: 5905730 (1999-05-01), Yang et al.
patent: 5991812 (1999-11-01), Srinivasan
patent: 6038217 (2000-03-01), Lyles
Basak Debashis
Pappu Surya
Zhou Fan
FORE Systems, Inc.
Schwartz Ansel M.
Vu Viet D.
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