Polysilicon/silicon junction field effect transistors and integr

Details Polysilicon/silicon junction field effect transistors and integr Polysilicon/silicon junction field effect transistors and integr

1982-02-19

1985-10-08

Clawson, Jr., Joseph E.

357 58, 357 59, H01L 2980

Patent

active

045463662

ABSTRACT:
A junction field effect transistor is fabricated in crystalline silicon by using oppositely doped polysilicon as the gate (POSFET). The depletion region of the pn (or np) junction formed at the polysilicon/silicon interface is used as the gate electrode to modulate the current path through the silicon channel from source to drain, the source and drain contacts may either be conventional metal or polysilicon heavily doped of the same conductivity type as the single crystal silicon substrate.

REFERENCES:
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patent: 4072545 (1978-02-01), De La Moneda
patent: 4072974 (1978-02-01), Ipri
patent: 4124933 (1978-11-01), Nicholas
patent: 4176372 (1979-11-01), Matsushita et al.
patent: 4187514 (1980-02-01), Tomisawa et al.
patent: 4222164 (1980-09-01), Triebwasser
patent: 4231051 (1980-10-01), Custode et al.

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