Polysilicon gate bus with interspersed buffers for driving a row

Details Polysilicon gate bus with interspersed buffers for driving a row Polysilicon gate bus with interspersed buffers for driving a row

1993-12-20

1995-03-07

Oberley, Alvin E.

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

345 87, 359 57, 359 59, G09G 336

Patent

active

053962621

ABSTRACT:
A polysilicon gate bus structure used for activating a row of pixels in a matrix of pixels of an active matrix liquid crystal display is described. The polysilicon gate bus is formed with a plurality of buffers interspersed along its length. A plurality of field effect transistors, each associated with one pixel in a row of pixels, have their gate electrodes connected to the polysilicon gate bus with the buffers interspersed among the gate electrode connections so as to speed up a row scanning signal propagation time to each of the gate electrode connections.

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"Liquid Crystal TV Displays: Principles and Applications . . . ," by E. Kaneko, D. Reidel Publishing Company, KTK Scientific Publishers/Tokyo, Chapter 7.
"Capacitance Estimation," Chapter 4, pp. 131-134.
"Liquid Crystal MOS Matrix High Density Program," by Bleha et al., Final Technical Report, prepared for U.S. Army, Sep. 1, 1981, AD-A152987.

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