Polysilicon fuse array structure for integrated circuits

Details Polysilicon fuse array structure for integrated circuits Polysilicon fuse array structure for integrated circuits

1994-08-16

1996-07-16

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

257258, 257259, H01L 2900, H01L 2980

Patent

active

055369685

ABSTRACT:
A programmable read only memory (PROM) including an array of polysilicon fuse elements. The fuse array is formed within a semiconductor substrate including first and second patterned signal layers electrically insulated from one another. Each polysilicon fuse element within the array connects a first electrical conductor residing in the first patterned signal layer with a second electrical conductor residing in the second patterned signal layer. The polysilicon fuse element is in the form of a narrow strip and is folded in order to cause a current flowing through the clement to crowd, lowering the amount of current required to heat the fuse element to its melting point, i.e. the threshold current. The PROM is programmed by passing a threshold current through selected fuse elements.

REFERENCES:
patent: 4045310 (1977-08-01), Jones et al.
patent: 5053999 (1991-10-01), Matsumura et al.

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