Polysilicon coated nitride-lined shallow trench

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

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257506, 257508, 257538, 257539, H01L 2176, H04L 2176

Patent

active

061181676

ABSTRACT:
A polycrystalline silicon coated nitride-lined shallow trench technique for isolating active regions on an integrated circuit involves reducing the oxide encroachment and the "bird's beak" structure. The technique involves forming an isolation trench, or recess, in the substrate. This recess is then lined with a layer of silicon dioxide layer, and then a layer of silicon nitride. Subsequently, a polycrystalline silicon material is deposited in the recess and is then oxidized to form a field oxide and planarized. Since the recess is nitride-lined, which prevents oxidizing species from reaching the oxide layer beneath the nitride layer, and the polycrystalline silicon is oxidized, the result is zero oxide encroachment resulting in the elimination of the "bird's beak" structure.

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J. Cheng, et al., "A Novel Shallow Trench Isolation Technique"Japanese Journal of Apllied Physics, vol. 36, No. 38, pp. 1319-1321 (Mar. 1997).

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