Polymer spacers for creating sub-lithographic spaces

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S595000, C438S689000, C438S725000, C438S780000, C204S192100

Reexamination Certificate

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11127175

ABSTRACT:
A method includes forming a group of first structures on a semiconductor device and forming spacers adjacent side surfaces of each of the first structures to form a group of second structures. The method further includes using the group of second structures to form at least one sub-lithographic opening in a material layer located below the group of second structures.

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patent: 101 10 150 (2002-09-01), None
patent: 1 170 800 (2002-01-01), None
Choukourov et al. (Surface and Coating Technology 151-152 (2002) pp. 214-217).
2002 IEEE International Solid-State Circuits Conference, Session 6, “SRAM and Non-Volatile Memories,” Feb. 4, 2004, 6 pages.
2002 IEEE International Solid-State Circuits Conference, 23 pages.

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