Polyimide inter-metal dielectric process

Coating processes – Electrical product produced – Condenser or capacitor

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156643, 156644, 156653, 156657, 1566591, 156668, 204192E, 427 85, 427 89, 427 95, 430313, 430314, H01L 21312

Patent

active

044952201

ABSTRACT:
A technique for employing polyimide as an inter-metal dielectric layer, while avoiding the difficulties usually associated with this material. An upper layer of silicon dioxide is employed as a hard mask over the polyimide, and is highly doped with phosphorous to prevent thermal cracking. Via holes are formed in a multi-stage etching process that includes a first dry-etching step that effects isotropic etching to form holes with desirably sloped sidewalls, and a second dry-etching step that effects anisotropic etching to extend the via holes through to a lower metal surface without significantly enlarging the holes in width. Finally, a dry-etching step is used to remove any residue of polyimide and to strip the silicon dioxide layer from over the polyimide. The bottom of the hole is then sputter-etched prior to metallization. In one preferred form of the method, a lower layer of silicon dioxide is formed between the lower metal layer and the polyimide layer, to facilitate removal of polyimide residue and to act as a barrier between the lower metal and the polyimide.

REFERENCES:
patent: 3700497 (1972-10-01), Epifano
patent: 3985597 (1976-10-01), Zielinski
patent: 4328262 (1982-05-01), Kurahasi
patent: 4357203 (1982-11-01), Zilez
patent: 4430153 (1984-02-01), Gleason

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