Polycrystalline silicon thin film transistor of liquid...

Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal

Reexamination Certificate

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C349S039000, C349S138000, C257S059000, C257S072000

Reexamination Certificate

active

06822703

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a TFT (thin film transistor) and a manufacturing method thereof and, more particularly, to a polycrystalline silicon thin film transistor for an LCD (liquid crystal display), which has both p-type and n-type transistors to form a CMOS (complementary metal-oxide semiconductor) structure for a driving circuit, and a method of manufacturing the same.
2. Description of the Related Art
In an information-oriented society these days, the importance of electronic display devices is well recognized, and the electronic displays of all kinds are widely used in various industrial fields.
Generally, an electronic display is an apparatus for visually transmitting information to a person, which means that an electrical information signal output from various electronic devices is converted into a visually recognizable optical information signal at the electronic display. Therefore, the electronic display serves as a media for connecting the person and the electronic devices.
The electronic display is generally divided into an emissive type display and a non-emissive type display. In the emissive type display, an optical information signal is displayed by using a light-emitting technique. In the non-emissive type display, an optical information signal is displayed by using an optical modulation technique such as light-reflecting, dispersing and interfering phenomenon, etc. The emissive type display is also called an active display, which includes a CRT (Cathode Ray Tube), a PDP (Plasma Display Panel), an LED (Light Emitting Diode) and an ELD (Eelectroluminescesnt Display), etc. The non-emissive display is also called a passive display, which includes an LCD (Liquid Crystal Display), an ECD (Electrochemical Display) and an EPID (Electrophoretic Image Display), etc.
The CRT is used in the image display devices such as television receivers and monitors, etc. The CRT has the highest market share mainly due to its satisfactory displaying quality and economical efficiency, but also has many disadvantages such as heavy weight, large volume and high power consumption.
Meanwhile, due to the recent rapid development of the semiconductor technology, various kinds of new electronic devices have been introduced, which they are driven by lower voltage, consume less power, and are much slimmer and lighter. This development eventually brought a new type display device, such as a flat panel type display, which is slimmer and lighter than the CRT, and driven by the lower driving voltage with lower power consumption. Among the various new flat panel type display, the LCD is much slimmer and lighter than any other displays and has the lower driving voltage and the lower power consumption while providing the displaying quality similar to that of the CRT. Therefore, the LCD is widely used in various electronic display devices.
The LCD comprises two substrates, each having an electrode, and a liquid crystal layer interposed therebetween. In the LCD, a voltage is applied to the electrodes to realign liquid crystal molecules and control an amount of light transmitted through the molecules. One of the LCDs, which is mainly used nowadays, is provided with the electrode formed at each of the two substrates and a thin film transistor for switching power supplied to each electrode. Generally, the thin film transistor (referred to as TFT, hereinafter) is formed within a pixel portion at one side of the two substrates.
The LCDs employing TFTs are divided into an amorphous type TFT-LCD and a polycrystalline type TFT-LCD. The polycrystalline type TFT-LCD has an advantage that the LCD can be driven at a high speed with low power consumption. Also, the TFT in the pixel portion can be simultaneously formed together with a semiconductor device for a drive circuit. Further, the drive circuit of the LCD normally has a CMOS (complementary metal-oxide semiconductor) structure, in which a complementary operation is achieved between different conductive types of transistors, to increase circuit performance.
However, since both an n-channel transistor and a p-channel transistor are formed together on the same substrate, a process of manufacturing the polycrystalline TFT-LCD is very complicated and difficult, as compared to the manufacturing process of the amorphous type TFT-LCD, in which a single conductivity type transistor is formed. Typically, the TFT within an LCD is formed on the substrate by a photolithography process using a mask. At the present, seven to nine sheets of mask are used for manufacturing the amorphous type TFT-LCD.
FIGS. 1A and 1B
depict the cross-sectional views of a pixel portion of a substrate where a TFT is formed thereon in order to show a conventional method of manufacturing a polycrystalline TFT having a top-gate structure using seven sheets of mask.
Referring to
FIG. 1A
, a blocking layer
12
is formed on an entire surface of a transparent substrate
10
, which is glass, quartz or sapphire. The blocking layer prevents the impurity in the substrate
10
from penetrating into a silicon layer during crystallization of an amorphous silicon layer in the subsequent process.
After depositing the amorphous silicon layer on the blocking layer
12
, the amorphous silicon layer is converted into a polycrystalline silicon layer by laser or furnace annealing. Then, the polycrystalline silicon layer is patterned using a photolithography process to form an active pattern
14
using the first mask (not shown).
A gate insulating layer
16
is deposited on the active pattern
14
and the blocking layer
12
. A gate conductive layer is formed over the gate insulating film
16
. The gate conductive layer formed in a p-type TFT region is etched using the photolithography process to form a gate electrode (not shown) of a p-type TFT using the second mask (not shown). Then, p-type impurities are ion-implanted to form source and drain regions
15
S,
15
D. The gate conductive layer in an n-type TFT region is etched using the photolithography process to form a gate electrode
18
of an n-type TFT (using the third mask). N-type impurity is ion-implanted to form the source/drain region
15
S,
15
D. In the ion-implanting process, the gate electrode
18
blocks the impurity ion to be implanted into the underlying active pattern
14
, thereby allowing a channel region
15
C to be defined at the active pattern
14
. Here, the process order of forming the p-type TFT, and the gate and the source/drain of the n-type TFT may be changed.
Sequentially, in order to activate the doped ions and secure the damage of the semiconductor layer, the annealing process is performed using a laser beam, etc. On the gate electrode
18
and the gate insulating layer
16
, there is formed an insulating interlayer
20
made of an organic insulating material or an inorganic insulating material such as SiO2 and SiNx. The insulating interlayer
20
is partially etched by the photolithography process to form the first contact hole
22
a
for exposing the source region
15
S and the second contact hole
22
b
for exposing the drain region
15
D of the active pattern
14
(using the fourth mask).
On the first and second contact holes
22
a
,
22
b
and the insulating interlayer
20
is deposited a metal layer. The metal layer is patterned using the photolithography process to thereby form a source/drain electrode
26
a
,
26
b
and a data line
16
c
(using the fifth mask).
Referring to
FIG. 1B
, on the source/drain electrode
26
a
,
26
b
, the data line
26
c
and the insulating interlayer
20
, there is formed a passivation layer
28
made of the organic insulating material and the inorganic insulating layer. The passivation layer
28
is partially etched by the photolithography process to form a via hole
30
for exposing the source electrode
26
a
(using the sixth mask).
Then, after a transparent conductive layer or a reflective conductive layer is deposited on the via hole
30
and the passivation layer
28
, the conductive layer is patterned by the photolithography proc

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